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Microarchitecture Rtl Engineer Jobs (NOW HIRING)

Description As a RTL Engineer, you will participate in the following: • Microarchitecture ... development and specification - from early high-level architectural exploration through micro ...

Description As a RTL Engineer, you will participate in the following: • Microarchitecture ... development and specification - from early high-level architectural exploration through micro ...

Description As a RTL Engineer, you will participate in the following: • Microarchitecture ... development and specification - from early high-level architectural exploration through micro ...

Description As a RTL Engineer, you will participate in the following: • Microarchitecture ... development and specification - from early high-level architectural exploration through micro ...

RTL Engineer

Mountain View, CA · On-site

$160K/yr

What You'll Do: * Own RTL design of digital blocks/subsystems for our accelerator ... Drive microarchitecture trade-offs - pipelining, datapath vs. control, clock/power gating - for ...

Description As a RTL Engineer, you will own or participate in the following: • Microarchitecture development and specification - from early high-level architectural exploration through micro ...

Lead RTL Engineer

Austin, TX · On-site

$101K - $133K/yr

Lead RTL Engineer Location: Austin, TX (Onsite) Key Skills * RTL Lead experience * Processor/CPU ... Microarchitecture and Architecture Ownership Responsibilities * Translate architecture ...

Description As a RTL Engineer, you will own or participate in the following: • Microarchitecture development and specification - from early high-level architectural exploration through micro ...

Description As a RTL Engineer, you will own or participate in the following: • Microarchitecture development and specification - from early high-level architectural exploration through micro ...

Description As a RTL Engineer, you will own or participate in the following: • Microarchitecture development and specification - from early high-level architectural exploration through micro ...

RTL Engineer

Mountain View, CA · On-site

$215K - $300K/yr

What You'll Do: * Own RTL design of digital blocks/subsystems for our accelerator ... Drive microarchitecture trade-offs - pipelining, datapath vs. control, clock/power gating - for ...

RTL Engineer

Austin, TX · On-site

$215K - $300K/yr

What You'll Do: * Own RTL design of digital blocks/subsystems for our accelerator ... Drive microarchitecture trade-offs -- pipelining, datapath vs. control, clock/power gating -- for ...

Description As a RTL Engineer, you will own or participate in the following: • Microarchitecture development and specification - from early high-level architectural exploration through micro ...

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Microarchitecture Rtl Engineer information

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$82.5K

$158.2K

$167.5K

How much do microarchitecture rtl engineer jobs pay per year?

As of Sep 10, 2026, the average yearly pay for microarchitecture rtl engineer in the United States is $158,244.00, according to ZipRecruiter salary data. Most workers in this role earn between $166,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What are popular job titles related to Microarchitecture Rtl Engineer jobs?

For Microarchitecture Rtl Engineer jobs, the most frequently searched job titles are:

Infographic showing various Microarchitecture Rtl Engineer job openings in the United States as of June 2026, with employment types broken down into 1% As Needed, 4% Full Time, 25% Part Time, 5% Temporary, 62% Contract, and 3% Nights. Highlights an 90% Physical, 7% Hybrid, and 3% Remote job distribution, with an average salary of $158,244 per year, or $76.1 per hour.

Staff RTL Engineer Ethernet Saratoga, CA Full-Time

Saratoga, CA • On-site

Other

Re-posted 13 days ago


Job description

Staff RTL Engineer – Ethernet

Saratoga, CA
Full-Time

Join a cutting-edge hardware company building next-generation networking silicon to accelerate AI training and inference.

We’re seeking a Staff RTL Engineer to help architect and implement high-performance Ethernet subsystems (MAC, PCS, SerDes) for advanced Networking ICs.

Key Responsibilities
  • Translate architecture into microarchitecture & RTL implementation

  • Design and integrate Ethernet IO subsystems (MAC/PCS/PHY/SerDes)

  • Perform RTL coding, debug, and design reviews

  • Collaborate with Verification, Physical Design & Firmware teams

  • Support post-silicon bring-up and productization

Qualifications
  • MSEE with 8–15 years of ASIC/RTL design experience

  • Strong expertise in Ethernet 802.3 protocols (Layer 2/3/4)

  • Experience integrating MAC + PCS + SerDes (100G+ preferred)

  • Solid understanding of SerDes fundamentals (DFE, CTLE, clocking)

  • Multiple successful networking ASIC tape-outs

  • Strong knowledge of ASIC design flow, DFT & physical implementation

If you're passionate about high-speed networking and AI infrastructure silicon, apply today.