San Francisco, CA · On-site
$160.20K/yr
... for a Package Design Engineer to drive the physical design and integration of advanced ... memory, RF, and cellular technologies. You will play a key role in shaping the architecture ...
San Francisco, CA · On-site
$160.20K/yr
... for a Package Design Engineer to drive the physical design and integration of advanced ... memory, RF, and cellular technologies. You will play a key role in shaping the architecture ...
San Jose, CA · On-site
$236.70K/yr
Job Title: Analog/Mixed-Signal Circuit Design Engineer Office Location: San Jose, CA Job Type ... Our cutting-edge memory technologies are essential in today's most advanced electronic devices and ...
San Jose, CA · On-site
$236.70K/yr
Job Title: Analog/Mixed-Signal Circuit Design Engineer Office Location: San Jose, CA Job Type ... Our cutting-edge memory technologies are essential in today's most advanced electronic devices and ...
$159K - $347K/yr
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... As a Design Engineer in Micron's Pathfinding Design Team, you will play a key role in shaping next ...
$159K - $347K/yr
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... As a Design Engineer in Micron's Pathfinding Design Team, you will play a key role in shaping next ...
San Jose, CA · On-site
$120K - $300K/yr
... memory. We're pairing that intelligence with next-generation hardware to create a universal ... About the Role We're looking for a Manufacturing Design Engineer who closes the gap between a ...
San Jose, CA · On-site
$120K - $300K/yr
... memory. We're pairing that intelligence with next-generation hardware to create a universal ... About the Role We're looking for a Manufacturing Design Engineer who closes the gap between a ...
Milpitas, CA · On-site
$121.41K - $201.10K/yr
We are seeking a Principal System Design Engineer to join our team in Milpitas, United States. The successful candidate will lead the design and development of advanced solid-state drive (SSD) memory ...
Milpitas, CA · On-site
$121.41K - $201.10K/yr
We are seeking a Principal System Design Engineer to join our team in Milpitas, United States. The successful candidate will lead the design and development of advanced solid-state drive (SSD) memory ...
We are seeking a Principal System Design Engineer to join our team in Milpitas, United States. The successful candidate will lead the design and development of advanced solid-state drive (SSD) memory ...
We are seeking a Principal System Design Engineer to join our team in Milpitas, United States. The successful candidate will lead the design and development of advanced solid-state drive (SSD) memory ...
We are seeking a Principal System Design Engineer to join our team in Milpitas, United States. The successful candidate will lead the design and development of advanced solid-state drive (SSD) memory ...
We are seeking a Principal System Design Engineer to join our team in Milpitas, United States. The successful candidate will lead the design and development of advanced solid-state drive (SSD) memory ...
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing ... AI-assisted design flows), and mentor engineers to ensure first-pass silicon success.
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing ... AI-assisted design flows), and mentor engineers to ensure first-pass silicon success.
Experience developing memory cell models for inclusion in simulation tool environment, such as Verilog-A * Programming Skills: Strong proficiency in scripting languages such as Python, Tcl, Perl, or ...
Quick apply
Experience developing memory cell models for inclusion in simulation tool environment, such as Verilog-A * Programming Skills: Strong proficiency in scripting languages such as Python, Tcl, Perl, or ...
San Jose, CA · On-site
$163.90K - $246K/yr
Design and develop non-volatile 3D-NAND memory array drivers and sensing circuits. Plan wordline ... Mentor and train junior engineers in simulation, modeling, and design methodologies. Employer will ...
San Jose, CA · On-site
$163.90K - $246K/yr
Design and develop non-volatile 3D-NAND memory array drivers and sensing circuits. Plan wordline ... Mentor and train junior engineers in simulation, modeling, and design methodologies. Employer will ...
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing ... AI-assisted design flows), and mentor engineers to ensure first-pass silicon success.
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing ... AI-assisted design flows), and mentor engineers to ensure first-pass silicon success.
$163.90K - $246K/yr
Design and develop non-volatile 3D-NAND memory array drivers and sensing circuits. Plan wordline ... Mentor and train junior engineers in simulation, modeling, and design methodologies. Employer will ...
$163.90K - $246K/yr
Design and develop non-volatile 3D-NAND memory array drivers and sensing circuits. Plan wordline ... Mentor and train junior engineers in simulation, modeling, and design methodologies. Employer will ...
San Jose, CA · On-site
$145.80K - $194.40K/yr
Experience developing memory cell models for inclusion in simulation tool environment, such as Verilog-A * Programming Skills: Strong proficiency in scripting languages such as Python, Tcl, Perl, or ...
San Jose, CA · On-site
$145.80K - $194.40K/yr
Experience developing memory cell models for inclusion in simulation tool environment, such as Verilog-A * Programming Skills: Strong proficiency in scripting languages such as Python, Tcl, Perl, or ...
San Jose, CA · Hybrid
$110.70K - $205.70K/yr
The Senior Package Design Engineer will have the opportunity to work with multiple package ... that makes industry-leading memory interface chips and Silicon IP to advance data center ...
San Jose, CA · Hybrid
$110.70K - $205.70K/yr
The Senior Package Design Engineer will have the opportunity to work with multiple package ... that makes industry-leading memory interface chips and Silicon IP to advance data center ...
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing ... AI-assisted design flows), and mentor engineers to ensure first-pass silicon success.
Quick apply
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing ... AI-assisted design flows), and mentor engineers to ensure first-pass silicon success.
San Jose, CA · On-site
$150K - $250K/yr
Job Title: Analog/Mixed-Signal Circuit Design Engineer Office Location: San Jose, CA Job Type ... Our cutting-edge memory technologies are essential in today's most advanced electronic devices and ...
San Jose, CA · On-site
$150K - $250K/yr
Job Title: Analog/Mixed-Signal Circuit Design Engineer Office Location: San Jose, CA Job Type ... Our cutting-edge memory technologies are essential in today's most advanced electronic devices and ...
Experience developing memory cell models for inclusion in simulation tool environment, such as Verilog-A * Programming Skills: Strong proficiency in scripting languages such as Python, Tcl, Perl, or ...
Experience developing memory cell models for inclusion in simulation tool environment, such as Verilog-A * Programming Skills: Strong proficiency in scripting languages such as Python, Tcl, Perl, or ...
San Jose, CA · Hybrid
$110.70K - $205.70K/yr
The Senior Package Design Engineer will have the opportunity to work with multiple package ... that makes industry-leading memory interface chips and Silicon IP to advance data center ...
San Jose, CA · Hybrid
$110.70K - $205.70K/yr
The Senior Package Design Engineer will have the opportunity to work with multiple package ... that makes industry-leading memory interface chips and Silicon IP to advance data center ...
San Jose, CA · Hybrid
$110.70K - $205.70K/yr
The Senior Package Design Engineer will have the opportunity to work with multiple package ... that makes industry-leading memory interface chips and Silicon IP to advance data center ...
San Jose, CA · Hybrid
$110.70K - $205.70K/yr
The Senior Package Design Engineer will have the opportunity to work with multiple package ... that makes industry-leading memory interface chips and Silicon IP to advance data center ...
San Jose, CA · On-site
$110.70K - $205.70K/yr
The Senior Package Design Engineer will have the opportunity to work with multiple package ... that makes industry-leading memory interface chips and Silicon IP to advance data center ...
San Jose, CA · On-site
$110.70K - $205.70K/yr
The Senior Package Design Engineer will have the opportunity to work with multiple package ... that makes industry-leading memory interface chips and Silicon IP to advance data center ...
$107.2K is the 25th percentile. Wages below this are outliers.
$90K - $111.3K
31% of jobs
$111.3K - $132.6K
5% of jobs
The median wage is $148K / yr.
$132.6K - $154K
19% of jobs
$170.4K is the 75th percentile. Wages above this are outliers.
$154K - $175.3K
26% of jobs
$175.3K - $196.6K
13% of jobs
$196.6K - $218K
4% of jobs
$218K - $239.3K
0% of jobs
$239.3K - $260.6K
0% of jobs
$260.6K - $282K
0% of jobs
$282K - $303.3K
1% of jobs
$303.3K - $324.6K
1% of jobs
$90K
$158K
$324.6K
8.1
Based on 661 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Role Number: 200661057-3401
Summary
Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for Apple's internal and custom components across products including iPhone, iPad, Mac, Apple Watch, and Apple TV. We're looking for a Package Design Engineer to drive the physical design and integration of advanced semiconductor packages across SoC, memory, RF, and cellular technologies. You will play a key role in shaping the architecture, scalability, and efficiency of next-generation products while advancing design methodologies through automation and AI.
Description
As a Package design engineer, you will lead advanced package architecture, drive next-generation package structure and configuration optimization, and own Package/SiP/module physical design from concept through tape-out. You will collaborate closely with cross-functional teams to deliver optimized SI/PI performance across a wide range of silicon technologies You are expected to leverage AI tools to enhance design efficiency, quality and performance.
Minimum Qualifications
Preferred Qualifications
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Computer and electronic product manufacturing
10,000+ Employees
Cupertino, CA, US
1976
