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Mask Layout Engineer Jobs in Texas (NOW HIRING)

SENIOR HW SYSTEMS ENGINEER

Plano, TX · On-site

$100K - $136K/yr

Define the front-end cavity filter duplexor mask to meet system requirements. * Assist designers ... Hands-on expertise with RF and hardware development tools, including schematic capture, PCB layout ...

SerDes Circuit Design Engineer

Austin, TX · On-site

$200K/yr

You will drive mask design to implement layout view of designs. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex ...

You will drive mask design to implement layout view of designs. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex ...

... masks/respirators, hi-vis safety vests, leather gloves and leather steel-toed work boots. ZACHRY ... Coordinates findings with engineering and architectural personnel * Should be proficient with ...

Coordinates findings with engineering and architectural personnel * Should be proficient with ... Prepare proper information for layout and grading. Prepare proper information for layout and ...

Define the front-end cavity filter duplexor mask to meet system requirements * Assist designers ... Hands-on expertise with RF and hardware development tools, including schematic capture, PCB layout ...

Survey Field Technician

El Paso, TX · On-site

$47K - $75K/yr

Wilson & Company, Inc., Engineers & Architects, a national multi-disciplined surveying and ... layout. * Ability to walk across uneven terrain. * Ability to be outside for extended amounts of ...

Survey Field Technician

El Paso, TX · On-site

$47K - $75K/yr

Wilson & Company, Inc., Engineers & Architects, a national multi-disciplined surveying and ... layout. * Ability to walk across uneven terrain. * Ability to be outside for extended amounts of ...

Must be able to read blueprints and other engineering drawings to efficiently perform work. * Must ... Layout, position, aligns, cut, assemble, and fit metal components together in various body ...

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Showing results 1-20

Mask Layout Engineer information

See Texas salary details

$41.9K

$112.6K

$172.8K

How much do mask layout engineer jobs pay per year?

As of Jul 14, 2026, the average yearly pay for mask layout engineer in Texas is $112,589.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,800.00 and $134,200.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Mask Layout Engineer position, and why are they important?

A Mask Layout Engineer needs a solid background in semiconductor physics, microelectronics, and integrated circuit (IC) design, often supported by a relevant engineering degree. Proficiency with Electronic Design Automation (EDA) tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys is typically required, and familiarity with industry standards like DRC/LVS checking is valuable. Strong attention to detail, problem-solving skills, and clear communication are important soft skills for collaborating with design and verification teams. These competencies are essential to ensure accurate, reliable IC layouts that meet stringent design and manufacturing specifications.

What is a Mask Layout Engineer job?

A Mask Layout Engineer is responsible for designing the physical layout of integrated circuits (ICs) based on schematic designs. They ensure that the layout meets design specifications, electrical performance criteria, and manufacturability constraints. This involves working with design rules, placement, routing, and verification tools to optimize performance and minimize errors. Mask Layout Engineers collaborate closely with circuit design teams, process engineers, and foundry teams to ensure that the final design can be successfully fabricated. Their work is critical in semiconductor manufacturing, impacting chip performance, size, and power efficiency.

What does a typical day look like for a Mask Layout Engineer?

A typical day for a Mask Layout Engineer involves translating circuit schematics into precise physical layouts using specialized software, running design rule checks (DRC) and layout versus schematic (LVS) verifications, and collaborating closely with circuit designers to resolve any issues or challenges. You’ll spend a significant portion of your time ensuring that layouts meet manufacturing process constraints and optimizing for performance and manufacturability. Mask Layout Engineers often work as part of a larger IC design team, interacting regularly with other engineers, project managers, and sometimes foundry partners. This role offers opportunities to deepen your technical skills and advance towards senior layout, design, or project leadership positions over time.

What job categories do people searching Mask Layout Engineer jobs in Texas look for? The top searched job categories for Mask Layout Engineer jobs in Texas are:
Infographic showing various Mask Layout Engineer job openings in Texas as of July 2026, with employment types broken down into 74% Full Time, 5% Temporary, 15% Contract, and 6% Nights. Highlights an 100% In-person job distribution, with an average salary of $112,589 per year, or $54.1 per hour.
Silicon Photonics Process Development Engineer (on-site)

Silicon Photonics Process Development Engineer (on-site)

Prosum Inc.

San Antonio, TX • On-site

Other

Posted 5 days ago

New


Job description

Job Description
Silicon Photonics Process Development EngineerSalary Range: $120k to $160kPosition Summary
We are seeking a Silicon Photonics Process Development Engineer to develop advanced semiconductor process modules and manufacturing capabilities supporting next-generation silicon photonics technologies. This role will lead process development from research and development through prototype builds and initial production while collaborating with cross-functional engineering teams, manufacturing partners, and technology suppliers to deliver innovative, production-ready solutions.
The ideal candidate has a strong background in semiconductor process development, silicon photonics, and process integration, with experience driving technology from concept through manufacturing.
Key Responsibilities
  • Develop and optimize semiconductor process modules for silicon photonics technologies.
  • Drive process development activities from prototype through production qualification and release.
  • Collaborate with cross-functional engineering, fabrication, and manufacturing teams to implement new process technologies.
  • Develop advanced packaging, 3D heterogeneous integration (3D-HI), and electro-optical process solutions.
  • Perform process qualification, technology characterization, reliability testing, and yield improvement initiatives.
  • Design and evaluate test structures and mask layouts to support research, development, and product qualification activities.
  • Utilize simulation and modeling tools to support process optimization and technology development.
  • Support foundry process development and manufacturing readiness initiatives.
  • Collaborate with internal stakeholders and external partners to evaluate new technologies and manufacturing capabilities.
  • Provide technical support during process transfers, manufacturing ramp-up, and production readiness activities.
  • Travel occasionally to support manufacturing, supplier, and technology development activities.
Required Qualifications
  • Bachelor's degree in Materials Science, Electrical Engineering, Physics, or a related engineering discipline.
  • Minimum of 5 years of semiconductor process development experience.
  • Strong understanding of semiconductor fabrication, process integration, and manufacturing technologies.
  • Experience working in high-volume semiconductor manufacturing environments.
  • Hands-on experience developing silicon photonics technologies.
  • Knowledge of advanced packaging, 3D heterogeneous integration (3D-HI), and electro-optical device manufacturing.
  • Experience with process qualification, reliability testing, yield improvement, and test structure development.
  • Proficiency with GDS layout tools, including Cadence Virtuoso.
  • Strong project management, analytical, problem-solving, and communication skills.
  • Ability to work effectively in a fast-paced, collaborative engineering environment.
Preferred Qualifications
  • M.S. or Ph.D. in Materials Science, Electrical Engineering, Physics, or a related engineering discipline.
  • Experience with semiconductor packaging technologies and advanced process integration.
  • Experience supporting foundry technology development and manufacturing enablement.
  • Familiarity with technology transfer from R&D into production.
What You'll Bring
  • A passion for developing next-generation semiconductor and silicon photonics technologies.
  • Strong technical aptitude with the ability to solve complex process engineering challenges.
  • Excellent collaboration and communication skills when working with multidisciplinary engineering teams.
  • A continuous improvement mindset focused on process optimization, manufacturing readiness, and product quality.

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