We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs. What you'll be doing: * Performing physical layout for mixed-signal functions like PLL ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs. What you'll be doing: * Performing physical layout for mixed-signal functions like PLL ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs. What you'll be doing: * Performing physical layout for mixed-signal functions like PLL ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs. What you'll be doing: * Performing physical layout for mixed-signal functions like PLL ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs. What you'll be doing: * Performing physical layout for mixed-signal functions like PLL ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs. What you'll be doing: * Performing physical layout for mixed-signal functions like PLL ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs. What you'll be doing: * Performing physical layout for mixed-signal functions like PLL ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs. What you'll be doing: * Performing physical layout for mixed-signal functions like PLL ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs for integration in VLSI products. * Take part in floor planning, custom layout and ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs for integration in VLSI products. * Take part in floor planning, custom layout and ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs for integration in VLSI products. * Take part in floor planning, custom layout and ...
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... designs for integration in VLSI products. * Take part in floor planning, custom layout and ...
... Mask Layout, Firmware, Silicon Bringup, and Analog mask layout. Our embedded services include ... Proven experience in designing, maintaining, and troubleshooting FE Design Verification flows and ...
... Mask Layout, Firmware, Silicon Bringup, and Analog mask layout. Our embedded services include ... Proven experience in designing, maintaining, and troubleshooting FE Design Verification flows and ...
Analog Layout Design Engineer
Santa Clara, CA · On-site
$237K/yr
... layout designs in deep sub-micron process technologies (FinFET). * Experience in industry standard mask design/verification tools (Cadence/Synopsys, Calibre ) * Hands-on custom layout design ...
Quick apply
Analog Layout Design Engineer
Santa Clara, CA · On-site
$237K/yr
... layout designs in deep sub-micron process technologies (FinFET). * Experience in industry standard mask design/verification tools (Cadence/Synopsys, Calibre ) * Hands-on custom layout design ...
Digital Layout Design Engineer
Santa Clara, CA · On-site
$144.60 - $263.80/hr
Designing complex custom layout for digital circuits in deep SubMicron CMOS technologies ... Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design ...
Digital Layout Design Engineer
Santa Clara, CA · On-site
$144.60 - $263.80/hr
Designing complex custom layout for digital circuits in deep SubMicron CMOS technologies ... Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design ...
Senior High-speed Photodiode Design Engineer
Cupertino, CA · On-site
$160 - $230/hr
Mask layout generation * Data analysis to build correlation between performance and designs. * Failure analysis of issues affecting functionality and performance. * Work closely with internal and ...
Senior High-speed Photodiode Design Engineer
Cupertino, CA · On-site
$160 - $230/hr
Mask layout generation * Data analysis to build correlation between performance and designs. * Failure analysis of issues affecting functionality and performance. * Work closely with internal and ...
Photonic Layout Engineer
Santa Clara, CA · On-site
$146 - $219/hr
... designers, PIC architects, process engineers, process design kit (PDK) developers, and test ... Perform physical verification of mask data to ensure design and manufacturability requirements are ...
Photonic Layout Engineer
Santa Clara, CA · On-site
$146 - $219/hr
... designers, PIC architects, process engineers, process design kit (PDK) developers, and test ... Perform physical verification of mask data to ensure design and manufacturability requirements are ...
Lead complex, full-loop manual and automated layout designs for waveguides, modulators ... Drive the full tape-out process, including floor planning, waveguide routing, and mask data ...
Lead complex, full-loop manual and automated layout designs for waveguides, modulators ... Drive the full tape-out process, including floor planning, waveguide routing, and mask data ...
Cadence Allegro Package Designer / APD+ / SiP, Siemens Xpedition Package Designer, Synopsys IC ... Familiarity with mask and RDL vendor flows, GDS-based layout environments (Virtuoso, KLayout), and ...
Cadence Allegro Package Designer / APD+ / SiP, Siemens Xpedition Package Designer, Synopsys IC ... Familiarity with mask and RDL vendor flows, GDS-based layout environments (Virtuoso, KLayout), and ...
Cadence Allegro Package Designer / APD+ / SiP, Siemens Xpedition Package Designer, Synopsys IC ... Familiarity with mask and RDL vendor flows, GDS-based layout environments (Virtuoso, KLayout), and ...
Cadence Allegro Package Designer / APD+ / SiP, Siemens Xpedition Package Designer, Synopsys IC ... Familiarity with mask and RDL vendor flows, GDS-based layout environments (Virtuoso, KLayout), and ...
Layout (FIRE) Extraction Engineer
Milpitas, CA · On-site
$120 - $160/hr
Knowledge of mask fabrication and design rules (DRC) * Software/Tool Proficiency * Experience with ... Experience modifying and optimizing designs based on customer/internal feedback * Ability to read ...
Layout (FIRE) Extraction Engineer
Milpitas, CA · On-site
$120 - $160/hr
Knowledge of mask fabrication and design rules (DRC) * Software/Tool Proficiency * Experience with ... Experience modifying and optimizing designs based on customer/internal feedback * Ability to read ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117.53 - $195.88/hr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Creating transistor level layout views from schematics, spanning from cell-level up through top ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117.53 - $195.88/hr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Creating transistor level layout views from schematics, spanning from cell-level up through top ...
... in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA ... Minimum of 5+ years proven experience in Mask and Layout Design. * Deep understanding of layout ...
... in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA ... Minimum of 5+ years proven experience in Mask and Layout Design. * Deep understanding of layout ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117K - $195K/yr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Creating transistor level layout views from schematics, spanning from cell-level up through top ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA · On-site
$117K - $195K/yr
Through close collaboration with IC designers and experts in IC technologies and IC design tools ... Creating transistor level layout views from schematics, spanning from cell-level up through top ...
... in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA ... Minimum of 5+ years proven experience in Mask and Layout Design. * Deep understanding of layout ...
... in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA ... Minimum of 5+ years proven experience in Mask and Layout Design. * Deep understanding of layout ...
To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to ... in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA ...
To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to ... in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA ...
Mask Layout Designer information
See Milpitas, CA salary details
$19.57 is the 25th percentile. Wages below this are outliers.
$11.77 - $21.39
31% of jobs
$21.39 - $31.02
16% of jobs
The median wage is $33.91 / hr.
$31.02 - $40.65
11% of jobs
$40.65 - $50.27
15% of jobs
$56.29 is the 75th percentile. Wages above this are outliers.
$50.27 - $59.90
4% of jobs
$59.90 - $69.53
6% of jobs
$69.53 - $79.15
5% of jobs
$79.15 - $88.78
3% of jobs
$88.78 - $98.40
2% of jobs
$98.40 - $108.03
3% of jobs
$108.03 - $117.66
3% of jobs
$11
$48
$117
How much do mask layout designer jobs pay per hour?
What is a mask layout designer?
What are the key skills and qualifications needed to thrive as a mask layout designer?
What are some common challenges faced by mask layout designers when collaborating with circuit design engineers?
What is the difference between Mask Layout Designer vs IC Design Engineer?
| Aspect | Mask Layout Designer | IC Design Engineer |
|---|---|---|
| Primary Focus | Designing photomask layouts for semiconductor manufacturing | Designing integrated circuit architectures and circuit components |
| Skills & Certifications | Knowledge of mask design tools, semiconductor fabrication processes | Strong circuit theory, EDA tools, and semiconductor device knowledge |
| Work Environment | Semiconductor fabrication facilities, design labs | Design offices, R&D labs, semiconductor companies |
| Industry Usage | Used in photomask manufacturing for chip production | Used in chip and circuit development for various electronic devices |
While both roles are integral to semiconductor development, the Mask Layout Designer focuses on creating precise photomask patterns for manufacturing, whereas the IC Design Engineer develops the overall circuit architecture and logic. Understanding these distinctions helps professionals and employers align skills and expectations in the semiconductor industry.
What are popular job titles related to Mask Layout Designer jobs in Milpitas, CA?
For Mask Layout Designer jobs in Milpitas, CA, the most frequently searched job titles are:
What job categories do people searching Mask Layout Designer jobs in Milpitas, CA look for?
The top searched job categories for Mask Layout Designer jobs in Milpitas, CA are:
What cities near Milpitas, CA are hiring for Mask Layout Designer jobs?
Cities near Milpitas, CA with the most Mask Layout Designer job openings:

Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
6th of 247 rated software companies
Job description
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to take on, that only we can pursue, and that matter to the world. This is our life's work, to amplify human creativity and intelligence. We would love to hear from you!
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal circuit designs.
What you'll be doing:
Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools.
You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
Take part in floor planning, custom layout and verifying against design rules and schematics.
What we need to see:
Have a BSEE or equivalent experience.
Minimum of 7+ years industry experience in Mask and Layout Design.
Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
You are an authority with Cadence custom circuit design tools - particularly virtuoso.
Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Primeyield.
You are able to work effectively in a team, good interpersonal skills, enthusiasm and positive energy.
You'll be proficient in scripting languages like perl, python, skill etc.
Should have knowledge of DRC and LVS checking flows, ability to customize decks.
You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US