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Lvs Drc Pdk Jobs (NOW HIRING)

Quantum PDK Engineer

New York, NY · On-site

$98K - $176K/yr

Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high-quality customer deliveries * Analyze device and circuit data to identify variability ...

Quantum PDK Engineer

Malta, NY · On-site

$98K - $176K/yr

Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high-quality customer deliveries * Analyze device and circuit data to identify variability ...

Quantum PDK Engineer

Essex Junction, VT · On-site

$98K - $176K/yr

Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high-quality customer deliveries * Analyze device and circuit data to identify variability ...

Staff PDK Development Engineer About the Role As part of the PDK Development Group within the ... Develop as well as improve physical verification (DRC/LVS) rule decks. * Develop rule decks for ...

Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high-quality customer deliveries * Analyze device and circuit data to identify variability ...

Quantum PDK Engineer

Essex Junction, VT · On-site

$98K - $176K/yr

Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high-quality customer deliveries * Analyze device and circuit data to identify variability ...

Staff PDK Development Engineer About the Role As part of the PDK Development Group within the ... Develop as well as improve physical verification (DRC/LVS) rule decks. * Develop rule decks for ...

Staff PDK Development Engineer About the Role As part of the PDK Development Group within the ... Develop as well as improve physical verification (DRC/LVS) rule decks. * Develop rule decks for ...

Staff PDK Development Engineer About the Role As part of the PDK Development Group within the ... Develop as well as improve physical verification (DRC/LVS) rule decks. * Develop rule decks for ...

Staff PDK Development Engineer About the Role As part of the PDK Development Group within the ... Develop as well as improve physical verification (DRC/LVS) rule decks. * Develop rule decks for ...

Quantum PDK Engineer

New York, NY · On-site

$98K - $176K/yr

Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high-quality customer deliveries * Analyze device and circuit data to identify variability ...

PDK Engineer

Bloomington, MN · On-site

$104K - $141K/yr

Developing and supporting physical verification checking scripts (DRC and LVS), PEX, ERC, etc ... Regression flow to provide quality assurance (QA) flow for testing of PDK, EDA tools and ...

Senior PDK Engineer

Santa Clara, CA · Hybrid

$126K - $164K/yr

We are looking for someone with experience in DRC/LVS, HSPICE, RC extraction, and EM analysis ... Align the PDK development schedule with foundries * Download the PDK and perform incoming checks

Developing and supporting physical verification checking scripts (DRC and LVS), PEX, ERC, etc ... Regression flow to provide quality assurance (QA) flow for testing of PDK, EDA tools and ...

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Lvs Drc Pdk information

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$36.5K

$90.8K

$147.5K

How much do lvs drc pdk jobs pay per year?

As of Jun 16, 2026, the average yearly pay for lvs drc pdk in the United States is $90,761.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $113,500.00 per year, depending on experience, location, and employer.

What is the difference between Lvs Drc Pdk vs Data Analyst?

AspectLvs Drc PdkData Analyst
Required CredentialsTechnical certifications, industry-specific trainingBachelor's degree in data science, statistics, or related field
Work EnvironmentManufacturing, logistics, or supply chain settingsOffice-based, corporate, or consulting environments
Employer & Industry UsageUsed in logistics, manufacturing, and quality controlUsed across finance, marketing, healthcare, and business sectors

While Lvs Drc Pdk professionals focus on logistics, inventory, and supply chain processes, Data Analysts interpret data to support business decisions across various industries. Both roles require analytical skills, but their work environments and industry applications differ significantly.

What is an LVS DRC PDK engineer?

An LVS DRC PDK engineer is a specialist in semiconductor design who ensures that integrated circuit (IC) layouts comply with design and manufacturing rules. 'LVS' stands for Layout Versus Schematic, which checks if an IC's physical layout matches its schematic design. 'DRC' means Design Rule Check, a process to verify that the physical layout adheres to manufacturing constraints. 'PDK' refers to Process Design Kit, a collection of files and data that define the fabrication process for a specific technology node. These engineers play a crucial role in making sure chips are manufacturable and function as intended.

What are the key skills and qualifications needed to thrive as an LVS DRC PDK Engineer, and why are they important?

To thrive as an LVS DRC PDK Engineer, you need a strong background in semiconductor design, knowledge of layout versus schematic (LVS) and design rule checking (DRC), and familiarity with process design kits (PDKs), typically with a degree in electrical or electronics engineering. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Calibre, or Synopsys IC Validator, as well as experience working with foundry PDKs, is essential. Attention to detail, strong analytical thinking, and effective communication are crucial soft skills for interpreting verification results and collaborating with design teams. These skills and qualifications are vital to ensure accurate, manufacturable chip designs and efficient workflows in the semiconductor industry.

What are some typical challenges faced by professionals working in LVS, DRC, and PDK roles within semiconductor design?

Professionals in LVS (Layout Versus Schematic), DRC (Design Rule Checking), and PDK (Process Design Kit) roles often encounter challenges such as keeping up with rapidly evolving process nodes and technology requirements. Ensuring accurate verification while managing tight project deadlines and large, complex designs is common. Collaboration with design engineers and foundry partners is essential for resolving issues and updating PDKs. Attention to detail and strong problem-solving skills are crucial for success, as even minor errors can significantly impact manufacturing outcomes.
Quantum PDK Engineer

Quantum PDK Engineer

GlobalFoundries

New York, NY • On-site

$98K - $176K/yr

Full-time

Posted 11 days ago


GlobalFoundries rating

8.2

Company rating: 8.2 out of 10

Based on 34 frontline employees who took The Breakroom Quiz

78th of 518 rated manufacturers


Job description

Quantum PDK design enablement.
About GlobalFoundries
GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world's most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.
Introduction
The Quantum PDK Design Enablement (MTS) role is a technical contributor within the Quantum Technology Solutions organization focused on enabling scalable quantum computing platforms. This position supports development of Process Design Kits (PDKs), compact models, and design enablement infrastructure that bridge advanced quantum device physics with semiconductor manufacturing and circuit design, including cryogenic control and readout ICs. This role operates at the intersection of device physics, modeling, and EDA, translating emerging quantum device technologies into usable, manufacturable, and customer-ready design environments.
Summary of Role
As a Member of Technical Staff, this role contributes to the development, deployment, and support of PDKs for quantum device platforms and associated cryogenic electronics. The engineer will work on compact modeling, device libraries, test chip development, and EDA integration, ensuring accurate, validated, and production-ready design collateral. The position emphasizes hands-on technical execution, automation, and strong cross-functional collaboration across device engineering, process integration, modeling, and design teams to enable scalable and high-performance quantum systems.
Essential Responsibilities
  • Develop, deploy, and maintain PDKs (tech files, model files, rule decks, runtime code) for quantum devices and cryogenic control/readout ICs
  • Create device libraries and parameterized cells (PCells), translating process design rules and SPICE/model specifications into design-ready implementations
  • Support compact model development, parameter extraction, and correlation across TCAD, silicon data, and cryogenic characterization
  • Integrate and validate PDKs within EDA environments (e.g., LVS/DRC, simulation flows), including development of automation tools representing fab processes
  • Design test structures and test chips, and develop validation plans to ensure model accuracy and silicon correlation
  • Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high-quality customer deliveries
  • Analyze device and circuit data to identify variability, reliability risks, and performance trends; support yield-learning and root-cause analysis
  • Create and maintain PDK documentation (release notes, application notes, known issues) and communicate usage guidance to users
  • Collaborate cross-functionally with device, process, integration, and EDA teams to align design enablement with technology capabilities
  • Contribute innovative ideas that may lead to intellectual property, patents, or advanced design enablement methodologies

Other Responsibilities:
  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications
  • BS (MS preferred) in Electrical Engineering, Microelectronics, Physics, Computer Science, or related field
  • ~5-6+ years of experience in semiconductor design enablement, PDK development, or EDA
  • Strong knowledge of semiconductor device physics and electronic devices
  • Experience with EDA tools (e.g., Cadence Virtuoso or similar) and design flows
  • Experience with device modeling, test structures, or silicon validation
  • Familiarity with scripting (e.g., Python, Tcl, Perl) and Unix/Linux environments
  • Strong analytical, debugging, and problem-solving skills
  • Effective communication and teamwork skills; detail-oriented and self-motivated

Preferred Qualifications
  • Experience with Cadence SKILL, PCell development, and PDK architectures
  • Background in TCAD simulation and compact model correlation
  • Familiarity with variability modeling, SPC, or statistical analysis methods
  • Experience with cryogenic electronics or low-temperature device behavior
  • Exposure to quantum devices, superconducting systems, or quantum computing hardware
  • Experience working with EDA vendors or enabling custom design flows
  • Knowledge of ML/AI techniques applied to modeling or EDA workflows

Expected Salary Range
$98,000.00 - $176,000.00
The exact Salary will be determined based on qualifications, experience and location.
If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.
An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.
GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.
All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law

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