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Lead Transceiver Design Engineer Jobs (NOW HIRING)

E-Space

FPGA Design Engineer - Avionics

Saratoga, CA · On-site

$150K - $250K/yr

We are looking for FPGA Design Engineers to develop, implement, and verify FPGA firmware for ... Develop SPI, I²C, GPIO, and other low-speed peripheral interfaces alongside high-speed transceiver ...

Itron, Inc

Sr RF Engineer- Contractor

West Union, SC · Hybrid

Lead RF circuit design from concept to production for low cost wireless communications product-line ... transceiver design and layout including RF PA, LNA, RF filters and matching, synthesizers, VCO ...

E-Space

FPGA Design Engineer - Avionics

Saratoga, CA · On-site

$150K - $250K/yr

We are looking for FPGA Design Engineers to develop, implement, and verify FPGA firmware for ... Develop SPI, I²C, GPIO, and other low-speed peripheral interfaces alongside high-speed transceiver ...

Cspeed

PCB Design & Validation Engineer

Palo Alto, CA · On-site

... lead PCB design for the transceiver module itself. You will review transceiver requirements ... Engineering or equivalent Preferred Qualifications * Experience with NRZ optical transceiver ...

Lumilens

Optical Systems Engineer Lead

San Jose, CA · On-site

$151K - $195K/yr

Lead and mentor a team in the design of optical transceiver products from concept through ... MS or Ph.D. in Engineering, Physics, Optics, or a related technical field What We Offer

Cspeed

PCB Design & Validation Engineer

Palo Alto, CA · On-site

... lead PCB design for the transceiver module itself. You will review transceiver requirements ... Engineering or equivalent Preferred Qualifications * Experience with NRZ optical transceiver ...

Itron, Inc.

Sr RF Engineer- Contractor

Union, SC · On-site

Lead RF circuit design from concept to production for low cost wireless communications product-line ... transceiver design and layout including RF PA, LNA, RF filters and matching, synthesizers, VCO ...

Coherent

Lead Silicon Photonics Design Engineer

Horsham, PA · On-site

$101K - $133K/yr

Work with module developers to design the optical subassemblies * Work with foundries to define and ... In-depth understanding of optical transceiver modules * Good knowledge of fiber optic and/or ...

II-VI Aerospace & Defense

Lead Design Engineer

Fremont, CA · On-site

$121K - $160K/yr

... transceiver designs. Our world-class and highly reliable InP technology platform is one of the very ... We are seeking a Lead Engineer to drive the design and development of high-power InP-based ...

Coherent

Lead Design Engineer

Fremont, CA

$121K - $160K/yr

... transceiver designs. Our world-class and highly reliable InP technology platform is one of the very ... We are seeking a Lead Engineer to drive the design and development of high-power InP-based ...

Coherent Corp.

Lead Design Engineer

Fremont, CA · On-site

$121K - $160K/yr

... transceiver designs. Our world-class and highly reliable InP technology platform is one of the very ... We are seeking a Lead Engineer to drive the design and development of high-power InP-based ...

II-VI Incorporated

Lead Design Engineer

Fremont, CA · On-site

$121K - $160K/yr

... transceiver designs. Our world-class and highly reliable InP technology platform is one of the very ... We are seeking a Lead Engineer to drive the design and development of high-power InP-based ...

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Lead Transceiver Design Engineer information

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How much do lead transceiver design engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for lead transceiver design engineer in the United States is $123,784.00, according to ZipRecruiter salary data. Most workers in this role earn between $102,500.00 and $135,000.00 per year, depending on experience, location, and employer.

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For Lead Transceiver Design Engineer jobs, the most frequently searched job titles are:

Infographic showing various Lead Transceiver Design Engineer job openings in the United States as of August 2026, with employment types broken down into 89% Full Time, 9% Part Time, and 2% Contract. Highlights an 89% Physical, 3% Hybrid, and 8% Remote job distribution, with an average salary of $123,784 per year, or $59.5 per hour.

FPGA Design Engineer - Avionics

Saratoga, CA • On-site

E-Space
See more jobs at E-Spaceexternal

$150K - $250K/yr

Full-time

Medical, PTO

Re-posted 11 days ago

Key responsibilities

  • Design and implement RTL in SystemVerilog or VHDL for satellite avionics FPGAs across various FPGA platforms.

  • Develop and verify inter-subsystem communication protocols such as AXI Memory-Mapped and AXI-Stream.

  • Support FPGA resource estimation, timing closure, clock-domain crossing, and fault-tolerant digital design techniques.

Job description

Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place!

E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems.

We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life.

We are looking for FPGA Design Engineers to develop, implement, and verify FPGA firmware for satellite avionics systems. You will work across multiple boards and subsystems, designing RTL for flight computers, payload processing, communications, and sensor interfaces. The role requires strong digital design fundamentals and the ability to deliver reliable, radiation-tolerant FPGA designs for a space environment.

Key Responsibilities:
  • Design and implement RTL in SystemVerilog or VHDL for satellite avionics FPGAs across a variety of FPGA platforms.
  • Develop AXI Memory-Mapped and AXI-Stream protocol implementations for inter-subsystem communication.
  • Perform FPGA resource and size estimation including logic, memory, and DSP budgeting.
  • Implement clock-domain-crossing (CDC) design techniques and verify timing closure across designs.
  • Design clock/reset tree architectures and manage timing-closure strategies for complex multi-clock designs.
  • Develop SPI, I²C, GPIO, and other low-speed peripheral interfaces alongside high-speed transceiver links.
  • Apply fault-tolerant digital design techniques including TMR, ECC, scrubbing, and SEE mitigation.
  • Perform synthesis and place-and-route using vendor toolchains, including custom placement constraints.
  • Support board bring-up by developing configuration, interface verification, and debug test sequences.
  • Collaborate with digital design, power, and PCB layout engineers to ensure FPGA support circuitry meets requirements.
Required Qualifications:
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of FPGA design experience in aerospace, defense, or high-reliability systems.
  • Proficiency in SystemVerilog and/or VHDL for RTL design.
  • Experience with FPGA synthesis, place-and-route, and timing closure workflows.
  • Demonstrated knowledge of AXI or similar bus protocols and interface design.
  • Experience with clock-domain crossing techniques, FIFO design, and multi-clock architectures.
  • Understanding of radiation effects on FPGAs and mitigation strategies (TMR, ECC, scrubbing).
Preferred Qualifications:
  • Experience with a variety of FPGA platforms and vendor toolchains (e.g., flash-based, SRAM-based, anti-fuse architectures).
  • Background in signal processing (FFT, FIR/IIR filters) and DSP integration.
  • Experience with transceiver design and high-speed serial communications on FPGAs.
  • Exposure to DAC/ADC interfaces and mixed-signal digital handling.
  • Experience with satellite or spacecraft FPGA applications.
  • Proficiency in Python or TCL scripting for automation and build infrastructure.
Tools & Technologies:
  • FPGA vendor toolchains (synthesis, place-and-route, timing analysis)
  • RTL simulation tools (e.g., VCS, QuestaSim, or equivalent)
  • Python, TCL, or shell scripting for build automation
  • Makefiles for FPGA build workflows
Additional Requirements
This is a fast-paced, high-impact environment - flexibility to occasionally work extended hours or weekends during critical periods is expected.

Why E-Space is right for you:

As a member of our team, you will play a crucial role in driving our success.  Our team members have a strong sense of dedication and responsibility; this includes a strong commitment to our mission to create an entirely new suite of global capabilities to improve lives, business efficiencies and build a smarter planet. This means that there will be times when extra hours, including nights and weekends, may be needed to meet critical deadlines and mission goals.  In return, we offer a dynamic work environment with opportunities for professional growth and development and the chance to make a meaningful impact in a high-growth industry.  

We want you to make the most of your journey at E-Space. That’s why we support and invest in the physical, emotional and financial well-being of our team members and their families. Some of what you can expect when working at E-Space:

• An opportunity to really make a difference
• Sustainability at our core
• Fair and honest workplace
• Innovative thinking is encouraged
• Competitive salaries
• Continuous learning and development
• Health and wellness care options
• Financial solutions for the future
• Optional legal services (US only)
• Paid holidays
• Paid time off

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.