Lead the design, integration, bring-up, and testing of custom hardware prototypes * Drive development efforts across both ASIC and FPGA technologies throughout the design lifecycle, including ...
Lead the design, integration, bring-up, and testing of custom hardware prototypes * Drive development efforts across both ASIC and FPGA technologies throughout the design lifecycle, including ...
Principal ASIC Design Verification Engineer
Saint Paul, MN · On-site
$200K - $220K/yr
FEASIC operates a full-scale ASIC design shop with cross-disciplinary fluency between digital logic ... Lead verification strategy, planning, and execution for complex ASIC, SoC, subsystem, IP, and FPGA ...
Principal ASIC Design Verification Engineer
Saint Paul, MN · On-site
$200K - $220K/yr
FEASIC operates a full-scale ASIC design shop with cross-disciplinary fluency between digital logic ... Lead verification strategy, planning, and execution for complex ASIC, SoC, subsystem, IP, and FPGA ...
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
ASIC Design Engineer
Andover, MA · On-site
$108K - $172K/yr
ASIC Design Engineer page is loaded## ASIC Design Engineerlocations: USA-CA Irvine Alton Parkway ... Participate in large complex design implementations using the latest technology nodes; lead one or ...
ASIC Design Engineer
Andover, MA · On-site
$108K - $172K/yr
ASIC Design Engineer page is loaded## ASIC Design Engineerlocations: USA-CA Irvine Alton Parkway ... Participate in large complex design implementations using the latest technology nodes; lead one or ...
ASIC Design Engineer (Hardware Security)
San Diego, CA · On-site
$140K - $229K/yr
Keywords SoC (system on chip), Security, ASIC, Digital Design, Crypto, Cryptography, Encryption, side-channel, subsystem, lead Minimum Qualifications * Bachelor's degree in Science, Engineering, or ...
ASIC Design Engineer (Hardware Security)
San Diego, CA · On-site
$140K - $229K/yr
Keywords SoC (system on chip), Security, ASIC, Digital Design, Crypto, Cryptography, Encryption, side-channel, subsystem, lead Minimum Qualifications * Bachelor's degree in Science, Engineering, or ...
Principal Analog/Mixed-Signal ASIC Engineer
Sunnyvale, CA · On-site
$237K/yr
Lead the charge in bringing our groundbreaking wireless optical communication to the world. Join us ... Contribute to ASIC design and layout, system-level optimization, and product strategy.
Principal Analog/Mixed-Signal ASIC Engineer
Sunnyvale, CA · On-site
$237K/yr
Lead the charge in bringing our groundbreaking wireless optical communication to the world. Join us ... Contribute to ASIC design and layout, system-level optimization, and product strategy.
Senior ASIC Design Engineer
Boulder, CO · On-site
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Senior ASIC Design Engineer
Boulder, CO · On-site
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Senior ASIC Design Engineer
Austin, TX · On-site
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Senior ASIC Design Engineer
Austin, TX · On-site
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Senior Principal ASIC FPGA Engineer
Boise, ID · On-site +1
$191K - $212K/yr
Drive RTL design - Lead detailed RTL development with a focus on correctness: bus fabric integrity ... Support proposals and subcontracts - Lead ASIC/FPGA technical approach on large proposals; may ...
Senior Principal ASIC FPGA Engineer
Boise, ID · On-site +1
$191K - $212K/yr
Drive RTL design - Lead detailed RTL development with a focus on correctness: bus fabric integrity ... Support proposals and subcontracts - Lead ASIC/FPGA technical approach on large proposals; may ...
Senior ASIC Design Engineer
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Quick apply
Senior ASIC Design Engineer
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Senior ASIC Design Engineer
Boulder, CO · On-site
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Senior ASIC Design Engineer
Boulder, CO · On-site
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and ... Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and ...
We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and ... Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and ...
Senior ASIC Design Engineer
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Quick apply
Senior ASIC Design Engineer
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Senior ASIC Design Engineer
Austin, TX · On-site
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
Senior ASIC Design Engineer
Austin, TX · On-site
$140K - $175K/yr
You will own the design from requirements definition through silicon bring-up, making key trade ... Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate ...
We're looking for a seasoned ASIC Lead Engineer who has been there -- not just written RTL, but ... Drive RTL design -- Lead detailed RTL development with a focus on correctness: bus fabric integrity ...
We're looking for a seasoned ASIC Lead Engineer who has been there -- not just written RTL, but ... Drive RTL design -- Lead detailed RTL development with a focus on correctness: bus fabric integrity ...
Senior ASIC Design Engineer
$116K - $182K/yr
Lead functional blocks and/or subsystems of digital ASICs from design to silicon verification. This includes RTL coding, verification, silicon validation, and qualification. * Proactively work with ...
Senior ASIC Design Engineer
$116K - $182K/yr
Lead functional blocks and/or subsystems of digital ASICs from design to silicon verification. This includes RTL coding, verification, silicon validation, and qualification. * Proactively work with ...
Lead ASIC Digital Design Engineer
$176K - $187K/yr
Responsibilities for this Position We're looking for a skilled Lead ASIC Digital Design Engineer who has meaningful hands-on experience in RTL design and has contributed to complex digital hardware ...
Lead ASIC Digital Design Engineer
$176K - $187K/yr
Responsibilities for this Position We're looking for a skilled Lead ASIC Digital Design Engineer who has meaningful hands-on experience in RTL design and has contributed to complex digital hardware ...
SoC (system on chip), Security, ASIC, Digital Design, Crypto, Cryptography, Encryption, side-channel, subsystem, lead Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related ...
SoC (system on chip), Security, ASIC, Digital Design, Crypto, Cryptography, Encryption, side-channel, subsystem, lead Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related ...
Cornelis Networks is looking for a Senior ASIC Design Engineering Manager to lead and grow our RTL design engineering team. Reporting to the VP of ASIC Engineering, with direct exposure to executive ...
Cornelis Networks is looking for a Senior ASIC Design Engineering Manager to lead and grow our RTL design engineering team. Reporting to the VP of ASIC Engineering, with direct exposure to executive ...
Senior Manager, ASIC Design Engineering
Austin, TX · On-site +1
Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure toexecutive ...
Senior Manager, ASIC Design Engineering
Austin, TX · On-site +1
Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure toexecutive ...
Lead Asic Design information
See salary details
$39.66 - $43.53
18% of jobs
$46.24 is the 25th percentile. Wages below this are outliers.
$43.53 - $47.40
10% of jobs
$47.40 - $51.27
7% of jobs
$51.27 - $55.14
5% of jobs
$55.14 - $59
6% of jobs
The median wage is $60.94 / hr.
$59 - $62.87
6% of jobs
$62.87 - $66.74
13% of jobs
$66.74 - $70.61
1% of jobs
$71.90 is the 75th percentile. Wages above this are outliers.
$70.61 - $74.48
25% of jobs
$74.48 - $78.34
4% of jobs
$78.34 - $82.21
4% of jobs
$39
$60
$82
How much do lead asic design jobs pay per hour?
What are popular job titles related to Lead Asic Design jobs?
For Lead Asic Design jobs, the most frequently searched job titles are:
Lead ASIC Design Engineer with Security Clearance
Bedford, MA • On-site
Other
Posted 9 days ago
MITRE Corporation rating
8.2
Based on 8 frontline employees who took The Breakroom Quiz
161st of 454 rated engineering
Job description
* Highly integrated, low Size, Weight, Power, and Cost (SWaP-C) platforms for mission-critical applications
* Real-time communication, sensing, and navigation systems utilizing cutting-edge FPGA and Software Defined Radio (SDR) technologies
* Advanced architectures for high-throughput signal processing and embedded computing
* Collaboration with world-class engineers and researchers on projects of national importance Roles & Responsibilities: Our team specializes in the rapid design, development, and deployment of advanced embedded systems for sensing, communications, and navigation applications. In this role, you will have the opportunity to: * Architect and develop highly integrated, low-SWaP-C ASIC and FPGA solutions
* Lead the design, integration, bring-up, and testing of custom hardware prototypes
* Drive development efforts across both ASIC and FPGA technologies throughout the design lifecycle, including requirements definition, architecture, design, verification, testing, and concept demonstration
* Implement and optimize advanced algorithms in hardware and software on embedded platforms
* Lead project teams and mentor junior engineers
* Interface with sponsors and build relationships for future programs and task
* Evaluate and incorporate emerging technologies into next-generation prototype systems Basic Qualifications: * Typically requires a minimum of 8 years of related experience with a Bachelor's degree in electrical engineering, computer engineering, or a related field or 6 years and a Master's degree in electrical engineering, computer engineering, or a related field
* Experience in one or more RTL languages, including VHDL, Verilog, and/or SystemVerilog
* Experience leading RTL design, simulation, synthesis, timing closure, and verification methodologies
* Demonstrated hands-on experience with EDA tool suites from industry leaders such as Cadence, Synopsys, and Siemens
* Experience designing and deploying ASICs on advanced semiconductor process nodes (
* Experience developing and integrating complex embedded hardware systems
* Deep understanding and application of best practices for design, verification, test, and deployment
* Experience integrating third-party IP into ASICs
* Proficiency with scripting and automation tools such as Python, TCL, CMake, or similar
* Experience leading technical efforts and small engineering teams
* Excellent written and verbal communication skills
* Experience working with semiconductor fabrication partners, EDA vendors, and third-party IP providers and integrating their solutions into a design flow
* Must be eligible to obtain and maintain a Top Secret U.S Government issued Security Clearance. Per the U.S. Government's eligibility requirements, you must be a U.S Citizen to be considered for a security clearance. * This position requires a minimum of 4 days a week on-site Preferred Qualifications: * Active Secret or Top Secret clearance.
* Experience working directly with sponsors and managing project execution within national security programs
* Experience with leading-edge semiconductor technologies (
* Experience with Design for Manufacturing (DFM) challenges, rules, methods, and validation workflows
* Expertise spanning the complete digital design lifecycle, including architecture, implementation, verification, testing, documentation, and configuration management
* Strong understanding of processor interfaces, memory-mapped architectures, and interrupt-driven systems
* Deep knowledge of microelectronics, digital circuits, and transistor-level design concepts
* Demonstrated leadership in FPGA verification methodologies, including UVM and OVM
* Experience with hardware emulation platforms such as Cadence Palladium and Siemens Veloce This requisition requires the candidate to have a minimum of the following clearance(s):
None This requisition requires the hired candidate to have or obtain, within one year from the date of hire, the following clearance(s):
Top Secret Salary compensation range and midpoint:
$156,400 - $195,500 - $234,600 Annual Work Location Type:
Onsite It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability. Commitment to Non-Discrimination All qualified applicants will receive consideration for employment without regard to disability, status as a protected veteran or any other status protected by applicable federal, state, local or international law. MITRE intends to maintain a website that is fully accessible to all individuals. If you are unable to search or apply for jobs and would like to request a reasonable accommodation for any part of MITRE's employment process, please email for general support and for intern positions. This service is for individuals requiring reasonable accommodation requests. Please note that vendor solicitations will not receive a reply. Benefits information may be found here . Copyright © 1997-2026, The MITRE Corporation. All rights reserved. MITRE is a registered trademark of The MITRE Corporation. Material on this site may be copied and distributed with permission only.
What MITRE Corporation employees say
Pay
Hours and flexibility
Workplace
Get the full story on Breakroom
About MITRE
Sourced by ZipRecruiter
Why choose between doing meaningful work and having a fulfilling life? At MITRE, you can have both. That's because MITRE people are committed to tackling our nation's toughest challenges-and we're committed to the long-term well-being of our employees. MITRE is different from most technology companies. We are a not-for-profit corporation chartered to work for the public interest, with no commercial conflicts to influence what we do. The R&D centers we operate for the government create lasting impact in fields as diverse as cybersecurity, healthcare, aviation, defense, and enterprise transformation. We're making a difference every day-working for a safer, healthier, and more secure nation and world. Our workplace reflects our values. We offer competitive benefits, exceptional professional development opportunities, and a culture of innovation that embraces diversity, inclusion, flexibility, collaboration, and career growth. If this sounds like the choice you want to make, then choose MITRE-and make a difference with us. MITRE is a trusted operator of federally funded research and development centers and we're on a mission to make the world a safer place-for all of humanity, today and in the future. To deliver on our mission, we need the world's best talent and leaders-groundbreakers and partnership-builders on a global scale in areas like healthcare, artificial intelligence, critical infrastructure resiliency, pandemic management, and cybersecurity. In return, we have the privilege of backing you with thousands of technical experts in diverse fields, a culture of innovation and knowledge sharing, access to data and resources uniquely available to MITRE through our wide-ranging partnerships across government, industry and academia.
Industry
It services
Company size
5,001 - 10,000 Employees
Headquarters location
McLean, VA, US
Year founded
1958