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Layout Design Engineer Jobs in Dallas, TX (NOW HIRING)

Micron

Semiconductor Design Engineer

Richardson, TX

Collaborate with Micron's various design and verification teams all over the world and support the ... Layout Optimization 5. Cadence Virtuoso 6. Cadence Layout XL 7. Debug and Signal Analysis As a ...

RTX

Power & Analog Design Engineer I

Mckinney, TX · On-site

$175K/yr

Design, analyze, test, and document analog and power conversion circuitry ... Partner with senior engineers and ECAD drafters through stack up definition, layout, and routing ...

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Layout Design Engineer information

See Dallas, TX salary details

$41K

$110K

$168.9K

How much do layout design engineer jobs pay per year?

As of Jul 26, 2026, the average yearly pay for layout design engineer in Dallas, TX is $110,028.00, according to ZipRecruiter salary data. Most workers in this role earn between $81,900.00 and $131,100.00 per year, depending on experience, location, and employer.

What does a layout design engineer do?

A layout design engineer develops and optimizes integrated circuit layouts to ensure proper functionality, performance, and manufacturability. They use electronic design automation (EDA) tools and work closely with circuit designers to translate schematics into physical layouts, adhering to design rules and specifications. This role often requires knowledge of semiconductor fabrication processes and attention to detail to minimize errors and improve device performance.

What engineers make $300,000 a year?

Senior engineers in specialized fields such as petroleum, aerospace, or software engineering can earn $300,000 or more annually, especially with extensive experience, advanced skills, and leadership roles. High-level positions often require advanced degrees, certifications, and a strong track record of project management or technical expertise.

What engineers make 200,000 a year?

Senior engineers in fields such as software, petroleum, aerospace, and electrical engineering often earn $200,000 or more annually, especially with extensive experience, advanced skills, and relevant certifications. High-level managerial or specialized roles in these disciplines tend to have compensation at or above this level.

What is a Layout Design Engineer job?

A Layout Design Engineer is responsible for designing and optimizing the physical layout of integrated circuits (ICs) in semiconductor chips. They work closely with circuit designers to ensure that the layout meets performance, power, and area constraints while adhering to manufacturing and design rules. Their role involves using EDA tools for placement, routing, and verification of chip layouts. They also conduct design rule checks (DRC) and layout versus schematic (LVS) verification to ensure design accuracy.

What engineer makes $500,000 a year?

A senior or specialized engineer, such as a petroleum engineer, aerospace engineer, or software engineer in high-paying industries, can earn $500,000 or more annually. These roles often require advanced skills, extensive experience, and sometimes leadership or executive responsibilities.

What are the key skills and qualifications needed to thrive in the Layout Design Engineer position, and why are they important?

To thrive as a Layout Design Engineer, you need strong skills in electronic circuit design, physical layout principles, and a background in electrical or electronics engineering, typically supported by a relevant bachelor's degree. Proficiency with EDA tools such as Cadence, Mentor Graphics, or Synopsys, and knowledge of industry standards (e.g., IPC) are essential. Exceptional attention to detail, problem-solving, and effective teamwork and communication skills help set candidates apart. These capabilities ensure precise, manufacturable layouts and smooth collaboration with multidisciplinary teams to meet project goals and deadlines.

What does a typical day look like for a Layout Design Engineer?

A typical day for a Layout Design Engineer involves translating schematic designs into detailed physical layouts using specialized CAD tools, collaborating closely with circuit designers to optimize for performance and manufacturability. You may spend time reviewing design rule checks (DRC), participating in team meetings to discuss project progress or resolve technical challenges, and coordinating with fabrication or test engineers to ensure successful implementation. The role requires both independent focus and frequent teamwork, offering a dynamic mix of technical and collaborative tasks. Depending on the company, you might also be involved in process improvement initiatives or mentoring junior engineers as you gain experience.

What are popular job titles related to Layout Design Engineer jobs in Dallas, TX? For Layout Design Engineer jobs in Dallas, TX, the most frequently searched job titles are:
What job categories do people searching Layout Design Engineer jobs in Dallas, TX look for? The top searched job categories for Layout Design Engineer jobs in Dallas, TX are:
Layout Design Engineer jobs near you
Infographic showing various Layout Design Engineer job openings in Dallas, TX as of July 2026, with employment types broken down into 87% Full Time, 10% Part Time, and 3% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $110,028 per year, or $52.9 per hour.
Staff ENGINEER - CE CAD

Staff ENGINEER - CE CAD

Micron Technology

Richardson, TX • On-site

Full-time

Medical, Dental, Vision, PTO

Posted 6 days ago

Micron Technology rating

8.8

Company rating: 8.8 out of 10

Based on 42 frontline employees who took The Breakroom Quiz

14th of 155 rated electronics manufacturers

Job description

Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Our EDA and Design Enablement team sits at the heart of Micron's memory development. We build and support the tools, rule decks, and flows that enable world-class CMOS design and physical verification at scale. We work closely with design, layout, and process teams, and we thrive on solving hard technical problems that directly impact product quality and reliability.
As a CAD Engineer, you will play a critical role in enabling robust physical verification across the design ecosystem. You will develop, improve, and support verification tools, rule decks, and flows while partnering closely with engineers across the design and technology stack. This is a hands-on role for someone who enjoys debugging, innovating, and ensuring design correctness and manufacturability.
Responsibilities:
  • Develop and improve physical verification tools, rule decks, and methodologies for CMOS design, including DRC, LVS, DFM, and PERC.

  • Debug, evaluate, and support in-house and commercial EDA verification solutions in a production environment.

  • Develop and maintain rule decks, and guide design teams on physical verification requirements and best practices.

  • Collaborate closely with design, layout, modeling, and process teams to solve verification and workflow challenges.

  • Evaluate EDA industry tools and identify opportunities to improve quality, performance, and efficiency.

  • Document processes and provide training and support for end users.

Minimum Qualifications:
  • Bachelor's degree in Computer Engineering, Computer Science, or a related field.

  • 2+ years of experience in CAD, VLSI, or a related semiconductor engineering role.

  • Experience programming in SVRF/TVF (Calibre), Python, and/or Perl.

  • Experience with physical verification rule deck development and/or validation, and familiarity with Calibre EDA tools and flows.

  • Experience working in Linux/Unix environments, shell scripting, databases, and version control.

  • Effective communication skills in a collaborative engineering environment.

Preferred Qualifications:
  • Understanding of CMOS process fundamentals and layout design rules.

  • Experience developing and debugging DRC/LVS rule decks, including antenna, ESD, LUP, and reliability checks.

  • Experience with parasitic extraction flows and methodologies.

  • Good understanding of physical verification methodologies, flows, and quality metrics.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
To learn about your right to work click here.
To learn more about Micron, please visit micron.com/careers
For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

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