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Junior Firmware Engineer Jobs in Riverside, CA (NOW HIRING)

Aveva

Senior Software Engineer

Irvine, CA

$131K - $173K/yr

Develop APIs and firmware-level REST integrations for scalable system deployment * Work with Docker ... Collaborate with cross-functional teams and mentor junior engineers Required Qualifications * 7+ ...

ETAP

Senior Software Engineer

Irvine, CA · On-site

$131K - $173K/yr

Develop APIs and firmware-level REST integrations for scalable system deployment * Work with Docker ... Collaborate with cross-functional teams and mentor junior engineers Required Qualifications * 7+ ...

EBizCharge

Senior Software Engineer (Card Present)

Irvine, CA · On-site

$131K - $173K/yr

... firmware coordination, and health monitoring. * Own and drive EMV Level 3 certification efforts in ... Act as a technical resource and mentor for junior and mid-level engineers on the squad, supporting ...

Fluxergy

Software Engineer III - Backend

Irvine, CA · On-site

Mentor junior team members and provide technical guidance as needed. * Create and maintain internal ... Experience with full-stack, firmware development, and board bring up. * Experience working within ...

Fluxergy

Software Engineer III - Backend

Irvine, CA

Mentor junior team members and provide technical guidance as needed.  * Create and maintain ... Experience with full-stack, firmware development, and board bring up. * Experience working within ...

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All JobsFirmware Engineer JobsJunior Firmware Engineer JobsJunior Firmware Engineer Jobs in Riverside, CA

Junior Firmware Engineer information

See Riverside, CA salary details

$34.9K

$74.9K

$114.2K

How much do junior firmware engineer jobs pay per year?

As of Jul 16, 2026, the average yearly pay for junior firmware engineer in Riverside, CA is $74,906.00, according to ZipRecruiter salary data. Most workers in this role earn between $50,600.00 and $83,500.00 per year, depending on experience, location, and employer.

What is the difference between Junior Firmware Engineer vs Firmware Developer?

AspectJunior Firmware EngineerFirmware Developer
Required CredentialsBachelor's in Electrical Engineering, Computer Engineering, or related field; some certificationsBachelor's or higher in a related field; certifications are common
Work EnvironmentEntry-level, team-based projects, hardware and embedded systemsMid-level to senior projects, embedded systems, software-focused
Industry UsageConsumer electronics, automotive, IoT devicesEmbedded systems, IoT, industrial automation
Search & Comparison IntentUnderstanding entry-level roles, career progressionClarifying job responsibilities, skill requirements

The main difference between a Junior Firmware Engineer and a Firmware Developer lies in experience and responsibility level. Junior Firmware Engineers are typically entry-level, focusing on learning and supporting firmware development, while Firmware Developers are more experienced, handling complex projects independently. Both roles require similar educational backgrounds and industry usage, but the Firmware Developer role generally involves more advanced tasks and autonomy.

What are the key skills and qualifications needed to thrive as a Junior Firmware Engineer, and why are they important?

A Junior Firmware Engineer typically needs a solid foundation in embedded systems programming, knowledge of C/C++ languages, and a relevant engineering degree. Familiarity with tools such as debuggers, oscilloscopes, integrated development environments (IDEs), and version control systems like Git is important, while certifications in embedded systems can be advantageous. Strong problem-solving skills, attention to detail, and effective teamwork abilities help individuals excel in this role. These skills ensure reliable firmware development, efficient troubleshooting, and seamless collaboration within engineering teams, all critical for delivering robust embedded products.

What are some common challenges a Junior Firmware Engineer may face when starting in this role, and how can they overcome them?

Junior Firmware Engineers often encounter challenges such as understanding legacy codebases, debugging hardware-software interactions, and adapting to rapid development cycles. It's helpful to proactively seek guidance from senior engineers, regularly review documentation, and utilize debugging tools specific to embedded systems. Participating in code reviews and collaborating closely with hardware teams can also accelerate learning and help overcome initial hurdles.

What are Junior Firmware Engineers?

Junior Firmware Engineers are entry-level professionals who help design, develop, test, and maintain the low-level software (firmware) that controls electronic devices and hardware. They typically work under the supervision of more experienced engineers, assisting with coding, debugging, and troubleshooting firmware issues. Junior Firmware Engineers often collaborate with hardware engineers to ensure that the firmware interacts correctly with the device's physical components. This role is ideal for recent graduates or those new to the field who are looking to build experience in embedded systems and firmware development.
What are popular job titles related to Junior Firmware Engineer jobs in Riverside, CA? For Junior Firmware Engineer jobs in Riverside, CA, the most frequently searched job titles are:
What job categories do people searching Junior Firmware Engineer jobs in Riverside, CA look for? The top searched job categories for Junior Firmware Engineer jobs in Riverside, CA are:
What cities near Riverside, CA are hiring for Junior Firmware Engineer jobs? Cities near Riverside, CA with the most Junior Firmware Engineer job openings:
Junior Firmware Engineer jobs near you
Infographic showing various Junior Firmware Engineer job openings in Riverside, CA as of July 2026, with employment types broken down into 92% Full Time, 5% Part Time, and 3% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $74,906 per year, or $36 per hour.
Senior Staff Design Engineer - PCIE/CXL Subsystem COE

Senior Staff Design Engineer - PCIE/CXL Subsystem COE

Marvell Technology, Inc.

Irvine, CA • On-site

Full-time

Life, Retirement

Re-posted 24 days ago

Job description

About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Center of Excellence (COE), part of the Custom Cloud Solutions (CCS) Business Unit within Marvell's Data Center Group, is chartered to define, develop, and maintain standard, production-ready IP subsystems - spanning PCIe/CXL, Ethernet, DDR/Memory, Security/Boot, Low-Speed IO, and other critical technologies - that customers and internal SoC teams can adopt with confidence.
By shifting left, the COE enables faster time-to-market, reduces integration risk, and ensures compliance, interoperability, and high performance across Marvell's SoC products. It embodies the "One Marvell" principle - sharing reusable components, verification environments, and knowledge across all business units to drive first-pass-right silicon.
As part of the COE, you will design, verify, and deliver IP subsystem building blocks powering Marvell's most advanced custom chips for hyperscale cloud, AI, and data center customers - working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation.
What You Can Expect
  • Own and drive PCIE/CXL subsystem micro-architecture definition, RTL implementation, and integration
  • Collaborate closely with Architecture teams to translate requirements into robust RTL designs
  • Work with Design Verification teams on test-plan reviews, debug, and coverage closure
  • Partner with Physical Design and DFT teams to ensure PD-friendly and DFT-ready RTL
  • Support silicon bring-up and post-silicon debug, working with firmware and validation teams
  • Drive design quality improvements, coding best practices, and reuse across projects
  • Participate in design reviews, milestone reviews, and cross-functional technical discussions
  • Mentor junior designers and provide technical leadership within the PCIE/CXL design domain

What We're Looking For
Required Qualifications
  • Master's/bachelor's degree in Electronics/Electrical Engineering with 10+ years of relevant experience in RTL design
  • Proven experience delivering complex PCIE/CXL controllers or subsystems from architecture through RTL closure
  • Strong hands-on experience in System Verilog / Verilog RTL development
  • Expertise/Familiarity in PCIE/CXL specifications
  • Deep knowledge of ARM-based SoC integration and AMBA protocols (AXI-4, CHI, ACE)
  • Solid grasp of Clocking, Resets, CDC/RDC, low-power techniques, and performance optimization
  • Experience supporting lint, CDC/RDC, synthesis, and design sign-off flows
  • Experience using industry-standard EDA tools from Synopsys, Cadence, Mentor/Siemens
  • Proficient in scripting languages such as TCL / Perl / Python
  • Experience with version control systems such as GIT, SVN, etc.

Additional Qualifications
  • Experience on end-to-end PCIE/CXL subsystem RTL design execution and sign-off
  • Experience designing high-performance, low-latency data paths and handling ordering, coherency, and error mechanisms
  • Proficient in debugging functional and performance issues at subsystem and SoC levels
  • Familiarity with post-silicon bring-up and debug methodologies in collaboration with firmware and validation teams
  • Prior experience mentoring engineers and providing technical leadership in a cross-functional environment

Expected Base Pay Range (USD)
135,900 - 201,130, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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