Analog Engineer
Austin, TX · On-site
$200K/yr
Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
Austin, TX · On-site
$200K/yr
Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
Austin, TX · On-site
$200K/yr
Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
$237K/yr
Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
$237K/yr
Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
$200K/yr
Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
$200K/yr
Conduct tape-out activities for analog and mixed-signal circuits, ensuring successful silicon ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
Austin, TX · On-site
$134K - $138K/yr
Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart ... At least 1 Completion of Tape Out on advanced technologies. 4+ years of experience in each of the ...
Austin, TX · On-site
$134K - $138K/yr
Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart ... At least 1 Completion of Tape Out on advanced technologies. 4+ years of experience in each of the ...
... edge CMOS process technology. What You Can Expect * Provide technical direction, coaching, and ... Physical design knowledge, from netlist handoff to GDS tape-out including floor planning, place and ...
... edge CMOS process technology. What You Can Expect * Provide technical direction, coaching, and ... Physical design knowledge, from netlist handoff to GDS tape-out including floor planning, place and ...
... edge CMOS process technology. What You Can Expect * Provide technical direction, coaching, and ... Physical design knowledge, from netlist handoff to GDS tape-out including floor planning, place and ...
... edge CMOS process technology. What You Can Expect * Provide technical direction, coaching, and ... Physical design knowledge, from netlist handoff to GDS tape-out including floor planning, place and ...
San Francisco, CA · On-site
$40 - $60/hr
While we can't reveal too much just yet, our team is tackling cutting-edge engineering challenges ... This internship offers a chance to work on hard problems of great impact and a unique opportunity ...
San Francisco, CA · On-site
$40 - $60/hr
While we can't reveal too much just yet, our team is tackling cutting-edge engineering challenges ... This internship offers a chance to work on hard problems of great impact and a unique opportunity ...
Austin, TX · On-site
$134K - $164K/yr
Our team drives innovation at the forefront of semiconductor design, working on cutting-edge System ... tape-out * Lead tool evaluation and selection to continuously advance the DV toolset and flow
Austin, TX · On-site
$134K - $164K/yr
Our team drives innovation at the forefront of semiconductor design, working on cutting-edge System ... tape-out * Lead tool evaluation and selection to continuously advance the DV toolset and flow
$134K - $164K/yr
Our team drives innovation at the forefront of semiconductor design, working on cutting-edge System ... tape-out * Lead tool evaluation and selection to continuously advance the DV toolset and flow
$134K - $164K/yr
Our team drives innovation at the forefront of semiconductor design, working on cutting-edge System ... tape-out * Lead tool evaluation and selection to continuously advance the DV toolset and flow
$129K - $158K/yr
Our team drives innovation at the forefront of semiconductor design, working on cutting-edge System ... tape-out * Lead tool evaluation and selection to continuously advance the DV toolset and flow
$129K - $158K/yr
Our team drives innovation at the forefront of semiconductor design, working on cutting-edge System ... tape-out * Lead tool evaluation and selection to continuously advance the DV toolset and flow
Hillsboro, OR · On-site
$122K - $232K/yr
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
Hillsboro, OR · On-site
$122K - $232K/yr
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
... cutting-edge printed circuit board layouts across diverse electrical systems, including both ... Generate and document design for manufacturing and tape out packages * Resolve complex PCB/PB ...
Westlake Village, CA · On-site
$211K/yr
Design of leading edge transimpedance amplifiers, using both SiGe BiCMOS and the most advanced CMOS ... Proven experience in high-performance receiver design including both chip tape-out and lab ...
Westlake Village, CA · On-site
$211K/yr
Design of leading edge transimpedance amplifiers, using both SiGe BiCMOS and the most advanced CMOS ... Proven experience in high-performance receiver design including both chip tape-out and lab ...
Westlake Village, CA · On-site
$211K/yr
Design of leading edge transimpedance amplifiers, using both SiGe BiCMOS and the most advanced CMOS ... Proven experience in high-performance receiver design including both chip tape-out and lab ...
Westlake Village, CA · On-site
$211K/yr
Design of leading edge transimpedance amplifiers, using both SiGe BiCMOS and the most advanced CMOS ... Proven experience in high-performance receiver design including both chip tape-out and lab ...
Austin, TX · On-site
$134K - $138K/yr
Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart ... At least 1 Completion of Tape Out on advanced technologies. * Knowledge of Static Timing Analysis ...
Austin, TX · On-site
$134K - $138K/yr
Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart ... At least 1 Completion of Tape Out on advanced technologies. * Knowledge of Static Timing Analysis ...
Austin, TX · On-site
$134K - $138K/yr
Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart ... At least 1 Completion of Tape Out on advanced technologies. * Knowledge of Static Timing Analysis ...
Austin, TX · On-site
$134K - $138K/yr
Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart ... At least 1 Completion of Tape Out on advanced technologies. * Knowledge of Static Timing Analysis ...
$9.13 - $10.47
2% of jobs
$10.47 - $11.80
2% of jobs
$11.80 - $13.13
3% of jobs
$13.13 - $14.47
17% of jobs
$14.55 is the 25th percentile. Wages below this are outliers.
$14.47 - $15.80
18% of jobs
The median wage is $16.51 / hr.
$15.80 - $17.13
16% of jobs
$17.13 - $18.47
11% of jobs
$18.89 is the 75th percentile. Wages above this are outliers.
$18.47 - $19.80
20% of jobs
$19.80 - $21.13
6% of jobs
$21.13 - $22.47
3% of jobs
$22.47 - $23.80
2% of jobs
$9
$17
$23

Design, develop, and implement analog circuits and mixed-signal IPs, including ADCs, DACs, voltage regulators, and high-speed I/O interfaces.
Perform circuit-level design, simulation, and optimization to meet power, performance, area, timing, and yield requirements.
Develop test plans for design verification and evaluate test results to meet specification requirements.
8.7
Based on 144 frontline employees who took The Breakroom Quiz
10th of 139 rated electronics manufacturers
The Role and Impact
Join Intel's Advanced Design Foundational IP Organization (AD-FIP) within the Design Technology Platform (DTP), a team that is pivotal in shaping the future of analog and mixed-signal IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and developing cutting-edge analog circuits in advanced process nodes. Your work will directly impact Intel's ability to deliver the best-in-class foundational IP and product designs that drive innovation across client, server, and networking technologies. Collaborating with cross-functional teams, you will play a critical role in optimizing performance, power, area, and yield of circuits while pushing the boundaries of what is possible in semiconductor technology.
Key Responsibilities
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications
3+ years of experience with the following technical skills
Preferred Qualifications
Come be a part of Intel's mission to shape the future of technology. Apply today to join a team where innovation, collaboration, and excellence drive the creation of transformative products.
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, AustinBusiness group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968