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Internship Sram Design Engineer Jobs in Chicago, IL

Cadence Design Systems Inc.

Lead Design Engineer

Cary, IL · On-site

$104K - $136K/yr

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational ... Detailed knowledge about industry standard interfaces such as PCI Express, DDR, LPDDR, SRAM, UCIe ...

SWE Solutions

Design Engineer I

Chicago, IL · On-site

$33 - $48/hr

Internship or co-op experience in civil design or construction projects. * Knowledge of local, state, and federal engineering standards and permitting processes. * Engineer-In-Training (EIT ...

SWE Solutions

Design Engineer I

Chicago, IL · On-site

$33 - $48/hr

Internship or co-op experience in civil design or construction projects. * Knowledge of local, state, and federal engineering standards and permitting processes. * Engineer-In-Training (EIT ...

SWE Solutions

Design Engineer I

Chicago, IL

$33 - $48/hr

Internship or co-op experience in civil design or construction projects. * Knowledge of local, state, and federal engineering standards and permitting processes. * Engineer-In-Training (EIT ...

HBK Engineering, LLC

Graduate Engineer

Oak Brook, IL · On-site +1

About Us HBK Engineering, LLC is a fully licensed, professional engineering design firm ... Required 2.5+ years of relevant experience (not internships) * US driver's license and US work ...

HBK Engineering, LLC

Graduate Engineer

Chicago, IL · On-site +1

About Us HBK Engineering, LLC is a fully licensed, professional engineering design firm ... Required 2.5+ years of relevant experience (not internships) * US driver's license and US work ...

Jump Trading

Campus FPGA Engineer (Intern)

Chicago, IL

$250K/yr

Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering

Jump Trading

Campus FPGA Engineer (Intern)

Chicago, IL · On-site

$250K/yr

Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering

Jump Trading

Campus FPGA Engineer (Intern)

Chicago, IL

$250K/yr

Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering

Jump Trading

Campus FPGA Engineer (Intern)

Chicago, IL · On-site

$250K/yr

Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering

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Internship Sram Design Engineer information

See Chicago, IL salary details

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How much do internship sram design engineer jobs pay per hour?

As of Aug 29, 2026, the average hourly pay for internship sram design engineer in Chicago, IL is $19.96, according to ZipRecruiter salary data. Most workers in this role earn between $14.86 and $22.31 per hour, depending on experience, location, and employer.

What is an internship SRAM design engineer?

Internship SRAM Design Engineers are students or recent graduates who work temporarily with engineering teams to help design, develop, and test Static Random-Access Memory (SRAM) components. They typically assist with circuit design, simulation, layout, and verification processes under the supervision of senior engineers. This role provides hands-on experience in integrated circuit (IC) design, exposure to industry-standard tools, and an understanding of the semiconductor development cycle. Interns also gain valuable insights into teamwork, problem-solving, and the application of theoretical knowledge in real-world projects.

What are some common challenges faced by an internship SRAM design engineer, and how can they be overcome?

Internship SRAM Design Engineers often encounter challenges such as understanding complex circuit design principles, adapting to specialized CAD tools, and keeping up with fast-paced project timelines. To overcome these hurdles, it's helpful to actively seek mentorship from senior engineers, engage in hands-on practice with design software, and participate in team design reviews. Embracing feedback and asking questions can accelerate learning, while staying organized helps manage multiple tasks effectively.

What are the key skills and qualifications needed to thrive as an internship SRAM design engineer, and why are they important?

To thrive as an Internship SRAM Design Engineer, you need a solid understanding of digital circuit design, CMOS fundamentals, and basic computer architecture, typically supported by coursework in electrical or computer engineering. Familiarity with EDA tools such as Cadence, Synopsys, and simulation software, as well as scripting languages like Python or TCL, is highly valued. Strong analytical thinking, attention to detail, and effective teamwork skills help interns excel in collaborative and problem-solving environments. These skills are crucial for accurately designing, simulating, and verifying SRAM circuits, ultimately contributing to high-performance and reliable chip designs.

What is the difference between Internship Sram Design Engineer vs Sram Design Engineer?

AspectInternship Sram Design EngineerSram Design Engineer
QualificationsEnrolled in or recent graduate of relevant engineering programBachelor's or Master's in Electrical/Electronic Engineering
Work EnvironmentInternship, supervised, learning-focusedFull-time, project-driven, professional setting
ResponsibilitiesAssisting in design tasks, learning industry toolsDesigning, testing, and developing SRAM components
DurationTypically 3-6 monthsFull-time, ongoing role

The main difference is that an Internship Sram Design Engineer is a temporary, learning-focused position for students or recent graduates, while a Sram Design Engineer is a full-time professional responsible for designing SRAM components. Interns gain hands-on experience, whereas full engineers lead projects and make design decisions.

What are the most commonly searched types of Sram Design Engineer jobs in Chicago, IL?

The most popular types of Sram Design Engineer jobs in Chicago, IL are:

What cities near Chicago, IL are hiring for Internship Sram Design Engineer jobs?

Cities near Chicago, IL with the most Internship Sram Design Engineer job openings:

Internship Sram Design Engineer jobs near you
Infographic showing various Internship Sram Design Engineer job openings in Chicago, IL as of July 2026, with employment types broken down into 87% Full Time, 10% Part Time, and 3% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $41,519 per year, or $20 per hour.

Lead Design Engineer

Cary, IL • On-site

Cadence Design Systems Inc.
Software Development • 5 - 10K employees

9.0

Company rating: 9.0 out of 10

Based on 5 frontline employees who took The Breakroom Quiz

34th of 246 rated software companies

Good employer

Respectful managers

Uninterrupted breaks

Learn more about Cadence Design Systems Inc.external

$104K - $136K/yr

Full-time

Re-posted 7 days ago

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We offer amazing opportunities to grow, no matter where you are in your career.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadenceis a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

  • The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
  • Cadence's employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
  • The unique "One Cadence - One Team" culture promotes collaboration within and across teams to ensure customer success
  • Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
  • You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day.

Job Responsibility

Palladium and Protium are high-capacitive, high-performance hardware assisted verification for complexed System-On-Chip (SOC). This role is to implement, verify, timing closure to tape out Palladium and Protium SOCs.

  • Work on RTL synthesis and floorplanning
  • Build clock trees and perform optimizations
  • Close timing, IR drop and physical verification
  • Review and Document designs for taping out
  • Interface with Front End RTL design teams and Back End Verification teams

Position Requirements/Qualifications:

  • BSdegreeinElectricalEngineeringwithaminimumof5yearsofexperienceORMSwithaminimumof3yearsofexperience
  • Experience with Cadence tools such as Innovus, Tempus, QRC, Voltus and Pegasus
  • Experience with advanced technologies like 5nm, 3ns and 2nm nodes
  • Experience using Linux servers, Script development using Shell/Perl/TCL/Python
  • Detailed knowledge about industry standard interfaces such as PCI Express, DDR, LPDDR, SRAM, UCIe, etc.
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