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Internship Septic Design Engineer Jobs in New York

Sherwood Design Engineers

Civil Engineer I

New York, NY · On-site

We have an amazing opportunity for a driven and curious Design Engineer focused on land development design to support our team. Minimum Skills * Typically industry internship experience * Bachelor ...

Sherwood Design Engineers

Civil Engineer I

New York, NY · On-site

We have an amazing opportunity for a driven and curious Design Engineer focused on land development design to support our team. Minimum Skills * Typically industry internship experience * Bachelor ...

Citadel Securities

FPGA Engineer (Intern)

Manhattan, NY · On-site

$4.3K - $4.8K/wk

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... the internship. Your Objectives: * Design, implement and test FPGA solutions across Citadel ...

Citadel Securities

FPGA Engineer (Intern)

Manhattan, NY

$107.50 - $120/hr

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... the internship. Your Objectives: * Design, implement and test FPGA solutions across Citadel ...

Jane Street

Hardware Engineer (FPGA/ASIC)

New York, NY · On-site

We expect interns to build hardware applications from concept to a working design; your projects ... Comfortable with a software programming language * Experienced with a Hardware Description (or ...

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All JobsSeptic Design Engineer JobsInternship Septic Design Engineer JobsInternship Septic Design Engineer Jobs in New York

Internship Septic Design Engineer information

What is the difference between Internship Septic Design Engineer vs Septic Design Engineer?

AspectInternship Septic Design EngineerSeptic Design Engineer
CredentialsEnrolled in or recent graduate of civil/environmental engineeringBachelor's or higher in civil/environmental engineering, with experience
Work EnvironmentInternship setting, assisting senior engineers, learning-focusedFull-time professional role, responsible for designing septic systems
ResponsibilitiesSupporting design tasks, research, learning industry standardsCreating septic system designs, calculations, client communication

The main difference is that an Internship Septic Design Engineer is a learning position for students or recent graduates gaining industry experience, while a Septic Design Engineer is a full-time professional responsible for designing septic systems independently. Internships focus on training and skill development, whereas full engineers handle project execution and client interactions.

Internship Septic Design Engineer jobs near you

Hardware Design Engineer - 2027 Grads

Hudson River Trading

New York, NY

Full-time

Posted 3 days ago

New

Job description

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technologies to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators. 

FPGAs and ASICs are critical pieces of our technology stack. We are looking for talented hardware developers to architect and design complex systems on a highly collaborative global team. In this role, you'll identify efficient ways to perform on-the-fly transformations of market data and implement models with complex data structures in RTL. You'll work with FPGA, ASIC, or both technologies as a member of our integrated team. No previous financial  experience is necessary!

Responsibilities

  • Contribute to a highly collaborative team, working closely with others to deliver hardware solutions
  • Describe and communicate hardware designs at a high level (the interface), low level (step-by-step algorithm/circuit), or anywhere in between
  • Analyze and fix problems quickly
  • Continuously learn, tinker, and explore new technologies to deepen your hardware expertise
  • Challenge your teammates and raise the bar for the work the team produces

Qualifications

  • Currently pursuing a Bachelor's, Masters, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for full-time employment in 2027
  • Proficiency in SystemVerilog
  • Deep knowledge of FPGA internals and/or ASIC 
  • Excellent digital logic design, optimization, debugging and problem solving skills
  • Thorough understanding of computer architecture and vendor tool suites
  • Familiarity with C++ and/or Python 
  • Comfortable working in a Linux environment
  • Previous internship experience in digital logic design
  • Expertise in networking protocols, CPU design, physical design, or machine learning accelerators is a big plus

Hardware Design and Verification at HRT

HRT hires for both design and verification roles. There is often overlap in skills, and both teams work together very closely. Design engineers typically have training in computer architecture and digital logic design, and they are primarily focused on creating hardware in SystemVerilog. Verification engineers typically have training in both digital logic and software engineering, and are primarily focused on building complex modeling and testing environments in Python and C++. If you are interested, you can view our FPGA/ASIC Design Engineer posting here.

We do not allow multiple applications. Please apply to the ONE role you are most interested in and we will consider you for all open positions when reviewing your application.

The estimated base salary range for this position is 300,000 USD per year (or local equivalent). The base pay offered may vary depending on multiple individualized factors, including location, job-related knowledge, skills, and experience. This role will also be eligible for discretionary performance-based bonuses and a competitive benefits package.

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