ZipRecruiter

Log In

1

Internship Schematic Jobs in Virginia (NOW HIRING)

Fractile

Physical Design Engineer

Bristol, VA · On-site

$80 - $120/hr

Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification ... internships. * Familiarity with EDA tools for place & route, STA, and sign‑off. * Basic ...

AECOM

Entry-level Structural Engineer

Roanoke, VA · Hybrid

Creates designs, calculations, sketches, diagrams, schematic drawings, and final working drawings ... Academic classes, projects or experience through internships or work that include design experience ...

AECOM

Entry-level Structural Engineer

Roanoke, VA · On-site

... schematic drawings, and final working drawings under the supervision of an experienced engineer ... Academic classes, projects or experience through internships or work that include design experience ...

AECOM

Entry-level Structural Engineer

Roanoke, VA · On-site

Creates designs, calculations, sketches, diagrams, schematic drawings, and final working drawings ... Academic classes, projects or experience through internships or work that include design experience ...

All JobsSchematic JobsInternship Schematic JobsInternship Schematic Jobs in Virginia

Internship Schematic information

What is the difference between Internship Schematic vs Electrical Engineering Intern?

AspectInternship SchematicElectrical Engineering Intern
Required CredentialsBasic coursework, some technical knowledgeEnrolled in electrical engineering program, relevant coursework
Work EnvironmentDesign labs, project teams, office settingsDesign labs, manufacturing sites, office settings
Employer & Industry UsageUsed across engineering firms, tech companiesCommon in engineering firms, manufacturing, tech sectors
Comparison Search IntentUnderstanding internship roles in schematic designLooking for electrical engineering internship opportunities

Internship Schematic roles focus on learning and assisting with schematic design and circuit diagrams, often requiring basic technical knowledge. Electrical Engineering Internships involve broader engineering tasks, including circuit analysis, testing, and design, typically requiring enrollment in an electrical engineering program. Both roles are found in similar environments and industries, but the Internship Schematic is more specialized in schematic design tasks.

What is an internship schematic?

An Internship Schematic is a structured outline or plan that details the objectives, activities, timeline, and expected outcomes of an internship program. It serves as a roadmap for both interns and employers, ensuring that the internship experience is organized and aligns with educational and professional development goals. This schematic may include specific tasks, learning milestones, mentorship arrangements, and evaluation methods. By following an internship schematic, organizations can provide a more meaningful and effective internship experience.

What are the key skills and qualifications needed to thrive as a schematic design intern, and why are they important?

To thrive as a Schematic Design Intern, you need a basic understanding of architectural and engineering design principles, typically supported by coursework in architecture, engineering, or a related field. Familiarity with design software such as AutoCAD, Revit, or SketchUp, as well as proficiency in Microsoft Office, is important for creating and presenting schematic drawings. Strong attention to detail, creativity, and effective communication help you collaborate with teams and interpret client needs. These skills ensure accurate, innovative designs and smooth project workflows in a fast-paced, collaborative environment.

What types of projects do interns typically work on during a schematic internship?

As a Schematic Intern, you can expect to be involved in a variety of real-world projects that support the design and development process of architectural or engineering schematics. Typical responsibilities include assisting with drafting schematic diagrams, conducting research to support design decisions, and collaborating with experienced team members to refine project layouts. Interns often gain hands-on experience using industry-standard software and participate in project meetings, offering valuable insights and learning opportunities. This role provides a strong foundation for future career growth by exposing you to multiple phases of the schematic design process and fostering teamwork skills.

What are popular job titles related to Internship Schematic jobs in Virginia?

For Internship Schematic jobs in Virginia, the most frequently searched job titles are:

What job categories do people searching Internship Schematic jobs in Virginia look for?

The top searched job categories for Internship Schematic jobs in Virginia are:

What cities in Virginia are hiring for Internship Schematic jobs?

Cities in Virginia with the most Internship Schematic job openings:

Internship Schematic jobs near you

Physical Design Engineer

Fractile

Bristol, VA • On-site

$80 - $120/hr

Other

Posted 9 days ago

Job description

Fractile’s mission is to enable a new chapter in the AI revolution. We’re pioneering AI innovation where hardware and software join to create something extraordinary, unlocking the power of the world’s largest language models with speed increases of x100. Our team is rapidly expanding, and we're searching for visionary engineers, scientists, and thinkers who share our passion for pushing boundaries and redefining what's possible. If you're ready to join a dynamic group of innovators shaping AI's future, we want to hear from you!

We are seeking a Physical Design Engineer to contribute to our next‑generation chip designs. As a Physical Design Engineer, you will support the implementation of complex IC physical designs, from synthesis to sign‑off. You will collaborate with cross‑functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability.

Key Responsibilities:
  • Support the physical implementation of ASIC/SoC designs, including floor planning, placement, clock tree synthesis (CTS), routing, and sign‑off.
  • Work on synthesis, timing analysis (STA), and optimisation to achieve strong PPA metrics.
  • Assist in power planning and analysis, addressing IR drop, electromigration, and related effects.
  • Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance.
  • Collaborate with DFT engineers to integrate design‑for‑test (DFT) structures into the physical implementation.
  • Develop flows in EDA tools such as Cadence Innovus, Synopsys Fusion Compiler, Mentor Graphics Calibre, and others.
  • Work closely with RTL and architecture teams to support design feasibility, constraints, and physical‑aware RTL design.
  • Work with advanced AI tools and models to improve productivity, analysis, and design quality.
Preferred Qualifications:
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 0–5 years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm, or below), including internships.
  • Familiarity with EDA tools for place & route, STA, and sign‑off.
  • Basic understanding of CMOS technology, semiconductor physics, and process limitations.
  • Exposure to timing closure, signal integrity, IR drop analysis, and formal verification.
  • Proficiency in scripting languages like TCL, Perl, or Python for automation is a plus.
  • Excellent problem‑solving skills, communication, and teamwork in a collaborative design environment.
  • Interest in working with advanced AI tools and models as part of the design workflow.
  • Experience or coursework in high‑performance computing (HPC), AI accelerators, or networking chips is a plus.
#J-18808-Ljbffr

Apply