Toronto, ON · On-site
CA$85K - CA$95K/yr
About the Role Join Altera IP solutions team and work oncutting edgeFPGA RTL and IP design! Altera ... Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or ...
Toronto, ON · On-site
CA$85K - CA$95K/yr
About the Role Join Altera IP solutions team and work oncutting edgeFPGA RTL and IP design! Altera ... Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or ...
Toronto, ON · On-site
CA$29.75 - CA$39/hr
Design and develop reliable, high quality software related to: on board software for our next ... Experience with RTL (Verilog and/or VHDL) and embedded SoCs * Hardware debugging experience ...
Toronto, ON · On-site
CA$29.75 - CA$39/hr
Design and develop reliable, high quality software related to: on board software for our next ... Experience with RTL (Verilog and/or VHDL) and embedded SoCs * Hardware debugging experience ...
Collaborate with digital and analog architects, RTL developers, and physical design teams to meet ... job experience, internship experience and / or schoolwork/classes/research.The preferred ...
Collaborate with digital and analog architects, RTL developers, and physical design teams to meet ... job experience, internship experience and / or schoolwork/classes/research.The preferred ...
To thrive as an RTL Design Intern, you need a solid understanding of digital design concepts, hardware description languages like Verilog or VHDL, and enrollment in or completion of a degree in electrical or computer engineering. Familiarity with simulation tools such as ModelSim or Synopsys VCS, and basic knowledge of EDA tools and version control systems, is typically expected. Strong analytical skills, attention to detail, and effective communication are highly valued soft skills in this role. These skills ensure you can efficiently contribute to design teams, troubleshoot issues, and communicate technical concepts clearly, all of which are critical for successful hardware development.
As an RTL Design Intern, you will usually assist with the design, implementation, and verification of digital circuits using hardware description languages. Your daily work may include writing RTL code, debugging simulation results, collaborating with senior engineers, and participating in code and design reviews. You’ll also help with testbench creation, documentation, and possibly automate design tasks to support the larger engineering team. The role offers valuable hands-on experience and insight into the full design cycle, making it a great learning opportunity for those interested in digital hardware engineering.
An Internship in RTL (Register Transfer Level) Design involves working on digital circuit design using hardware description languages like Verilog or VHDL. Interns assist in designing, simulating, and verifying digital circuits, ensuring they meet performance and power requirements. They often work with FPGA or ASIC teams to validate designs and optimize hardware implementations. This role provides hands-on experience in hardware development and exposure to industry-standard tools like Synopsys, Cadence, or Xilinx.
About Altera
At Altera, our independence as the world's largest pureplay FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industryleading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely-empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.
About the Role
Join Altera IP solutions team and work oncutting edgeFPGA RTL and IP design! Altera's IP Solutions Engineering (IPSE) team develops comprehensive solutions to provide customers easy and efficient access to the capabilities of Altera's FPGA devices. These solutions are provided as highly configurable intellectual property (IP) cores that are fully integrated with Altera's software CAD tool, Quartus Prime. The External Memory Interfaces (EMIF) team is responsible for developing IPs for communication with state-of-the-art DDR and LPDDR devices. The ever-growing demand for faster and higher-density memories - especially in the data center and machine learning sectors - presents a challenging design problem that requires system-level knowledge of silicon, software, IP, and customer applications.
You will work with a team of engineers to develop and verifystate-of-the-art External Memory IP cores for interfacing with DDR5 and LPDDR5 memories. You will be working on advanced FPGA architectures, design definition, implementation, and verification. Additionally, you will also be developing design examples and simulation models, accompanied by a rich set of technical documentation. In this role, you will work closely with multiple teams, including silicon design and validation, post-silicon validation, application engineering, and customer experience teams, to ensure seamless development, integration, and optimization of high-speed interface IP solutions.
Your specific responsibilities will include, but are not limited to the following:
Architecture and Design based on the latest protocol specifications for DDR and LPDDR devices
RTL development
Device support and CAD tool integration
Verification (e.g.verification IP, methodologies, frameworks, bus functional models, regression tests)
Hardware power-on and debug
New product release and rollout support
Customer technical support
The candidate shouldpossessthe following behavioral traits:
Strong skills in communication, initiative, innovation, and teamwork
Highly motivated to learn and adapt to fast-changing technologies and environments
Excellent problem-solving skills and attention to detail
Demonstrate fundamental values such as accountability, integrity, and a winning mindset
Collaborative mindset, strong influencing skills, and a willingness to work across geographical locations
Salary
Our compensation is designed to reflect the Canadianlabourmarket. The actual salary offered may vary based on several factors, including theposition'slocation, as well as the candidate's experience, skills, training, and job-specific knowledge. In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.
Estimated Salary Range: $85,000 - $95,000CAD
We use artificial intelligence to screen, assess, or select applicants for the position.This posting is for an existing vacancy.Canadian work experience is notrequiredfor this role.Applicants must be eligible for any required Canada export authorizations.
You mustpossessthe below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience.Additionalpreferred qualifications are in addition to theminimumrequirements and are considered a plus factor inidentifyingtop candidates.
Minimum Qualifications:
Currently pursuing a BS degree in Computer Engineering, Engineering Science, Electrical Engineering, ComputerScienceor related field
3+ months of experience in Digital logic hardware (e.g.SystemVerilog, Verilog and/or VHDL) design or verification
3+ months of experience in scripting languages and/or software programming (e.g.Python/TCL/Perl and/or C/C++)
Preferred Qualifications:
FPGA design experience
Experience with RTL simulation, timing closure and static timing analysis
Experience with DDR and/or LPDDR hardware interfaces
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1,001 - 5,000 Employees
San Jose, CA, US
1983
