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Internship Formwork Design Engineer Jobs in Manhattan, NY

Citadel Securities

FPGA Engineer (Intern)

Manhattan, NY · On-site

$4.3K - $4.8K/wk

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... the internship. Your Objectives: * Design, implement and test FPGA solutions across Citadel ...

Citadel Securities

FPGA Engineer (Intern)

Manhattan, NY · On-site

$107.50 - $120/hr

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... the internship. Your Objectives: * Design, implement and test FPGA solutions across Citadel ...

Jane Street

Hardware Engineer (FPGA/ASIC)

New York, NY · On-site

We expect interns to build hardware applications from concept to a working design; your projects ... Comfortable with a software programming language * Experienced with a Hardware Description (or ...

Kiewit

Kiewit Scholars - Summer 2027 Internship

Cranford, NJ · On-site

$17 - $22.25/hr

Our Design Engineer Interns are a part of our teams that supports all aspects of the construction process by performing innovative design engineering through brainstorming conceptual designs ...

Clerkie

Software Engineer Internship

New York, NY · On-site +1

$80/hr

This is a full-time (40+ hours a week) salaried 12 month internship where you'll work closely with our Engineering, Product, and Design teams to build real features, solve real problems, and ...

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All JobsFormwork Design Engineer JobsInternship Formwork Design Engineer JobsInternship Formwork Design Engineer Jobs in Manhattan, NY

Internship Formwork Design Engineer information

See Manhattan, NY salary details

$12

$21

$32

How much do internship formwork design engineer jobs pay per hour?

As of Sep 7, 2026, the average hourly pay for internship formwork design engineer in Manhattan, NY is $21.32, according to ZipRecruiter salary data. Most workers in this role earn between $17.79 and $23.08 per hour, depending on experience, location, and employer.

What is the difference between Internship Formwork Design Engineer vs Junior Civil Engineer?

AspectInternship Formwork Design EngineerJunior Civil Engineer
Required CredentialsEnrolled in or recent graduate of Civil Engineering or related fieldEnrolled in or recent graduate of Civil Engineering or related field
Work EnvironmentDesign offices, construction sites, project planningConstruction sites, design offices, project management
Industry UsageSpecifically in formwork and construction designBroader civil engineering projects including infrastructure and buildings

Internship Formwork Design Engineers focus on learning and assisting in designing formwork systems for construction projects, often within a specialized environment. Junior Civil Engineers have a broader scope, working on various civil engineering tasks across multiple project types. Both roles require similar educational backgrounds but differ in specialization and project involvement.

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Internship Formwork Design Engineer jobs near you
Infographic showing various Internship Formwork Design Engineer job openings in Manhattan, NY as of August 2026, with employment types broken down into 88% Full Time, 8% Part Time, and 4% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $44,337 per year, or $21.3 per hour.

FPGA Engineer (Intern)

Citadel Securities

Manhattan, NY • On-site

$4.3K - $4.8K/wk

Other

Re-posted 18 days ago

Job description

At Citadel Securities, a leading global market maker, our team of FPGA Engineers work in small teams to create the next generation FPGA solutions to support ultra-low latency trading systems across the firm. FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help optimize trading system performance. As an intern, you’ll get to challenge the impossible in technology through an 11-week program that will allow you to collaborate and connect with senior team members. In addition, you’ll get the opportunity to network and socialize with peers throughout the internship. Your Objectives:

  • Design, implement and test FPGA solutions across Citadel Securities’ trading businesses
  • Improve trading system efficiency and performance to accelerate algorithmic trade signal generation and order execution
  • Work in small teams to build the future of finance

Your Skills & Talents:

  • A deep passion for technology and hardware development
  • Pursuing a Bachelor’s, Master’s or PhD in Electrical Engineering, Computer Engineering or related fields
  • Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus.
  • Experience in one or more of the following areas: Hardware Architecture, Simulation, Systems Integration, Hardware Validation and Testing, FPGA Synthesis, and Static Analysis
  • Strong written and verbal communication skills
  • Intellectual curiosity and passion for solving challenging problems using technology

Opportunities available in New York.

In accordance with applicable law, the base salary range for this role is $4,300 to $4,800 per week.

About Citadel Securities

Citadel Securities is the next-generation capital markets firm and a leading global market maker. We provide institutional and retail investors with the liquidity they need to trade a broad array of equity and fixed income products in any market condition. The brightest minds in finance, science and technology use powerful, advanced analytics to solve the market’s most critical challenges, turning big ideas into real-world outcomes.

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