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Internship Formwork Design Engineer Jobs in Manhattan, NY

DESIGN ENGINEER INTERN

Queens, NY · On-site

$17.75 - $23/hr

BEDC seeks to hire two Civil Engineering Interns to support the Structural section, located in our Lefrak Office in Queens, NY. Under direct supervision of the Lead Design Engineer, the selected ...

DESIGN ENGINEER INTERN

Queens, NY · On-site

$70K - $80K/yr

BEDC seeks to hire two Civil Engineering Interns to support the Structural section, located in our Lefrak Office in Queens, NY. Under direct supervision of the Lead Design Engineer, the selected ...

DESIGN ENGINEER INTERN

Queens, NY · On-site

$17.75 - $23/hr

BEDC seeks to hire two Civil Engineering Interns to support the Structural section, located in our Lefrak Office in Queens, NY. Under direct supervision of the Lead Design Engineer, the selected ...

Project Engineer

Kenilworth, NJ · On-site

$60 - $80/hr

Proven experience in formwork and shoring design, preferably in the construction industry ... Professional Engineer (PE) license a major plus. Additional Information In accordance with ...

Proven experience in formwork and shoring design, preferably in the construction industry ... Professional Engineer (PE) license a major plus. Additional Information In accordance with ...

Project Engineer

Kenilworth, NJ · On-site

$65K - $75K/yr

Proven experience in formwork and shoring design, preferably in the construction industry ... Professional Engineer (PE) license a major plus. Additional Information In accordance with ...

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Internship Formwork Design Engineer information

See Manhattan, NY salary details

$12

$21

$32

How much do internship formwork design engineer jobs pay per hour?

As of Sep 7, 2026, the average hourly pay for internship formwork design engineer in Manhattan, NY is $21.32, according to ZipRecruiter salary data. Most workers in this role earn between $17.79 and $23.08 per hour, depending on experience, location, and employer.

What is the difference between Internship Formwork Design Engineer vs Junior Civil Engineer?

AspectInternship Formwork Design EngineerJunior Civil Engineer
Required CredentialsEnrolled in or recent graduate of Civil Engineering or related fieldEnrolled in or recent graduate of Civil Engineering or related field
Work EnvironmentDesign offices, construction sites, project planningConstruction sites, design offices, project management
Industry UsageSpecifically in formwork and construction designBroader civil engineering projects including infrastructure and buildings

Internship Formwork Design Engineers focus on learning and assisting in designing formwork systems for construction projects, often within a specialized environment. Junior Civil Engineers have a broader scope, working on various civil engineering tasks across multiple project types. Both roles require similar educational backgrounds but differ in specialization and project involvement.

What job categories do people searching Internship Formwork Design Engineer jobs in Manhattan, NY look for?

The top searched job categories for Internship Formwork Design Engineer jobs in Manhattan, NY are:

What cities near Manhattan, NY are hiring for Internship Formwork Design Engineer jobs?

Cities near Manhattan, NY with the most Internship Formwork Design Engineer job openings:

Infographic showing various Internship Formwork Design Engineer job openings in Manhattan, NY as of August 2026, with employment types broken down into 88% Full Time, 8% Part Time, and 4% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $44,337 per year, or $21.3 per hour.

Hardware Design Engineer - 2027 Grads

Hudson River Trading

New York, NY • On-site

Full-time

Posted 6 days ago


Job description

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technologies to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators. 

FPGAs and ASICs are critical pieces of our technology stack. We are looking for talented hardware developers to architect and design complex systems on a highly collaborative global team. In this role, you'll identify efficient ways to perform on-the-fly transformations of market data and implement models with complex data structures in RTL. You'll work with FPGA, ASIC, or both technologies as a member of our integrated team. No previous financial  experience is necessary!

Responsibilities

  • Contribute to a highly collaborative team, working closely with others to deliver hardware solutions
  • Describe and communicate hardware designs at a high level (the interface), low level (step-by-step algorithm/circuit), or anywhere in between
  • Analyze and fix problems quickly
  • Continuously learn, tinker, and explore new technologies to deepen your hardware expertise
  • Challenge your teammates and raise the bar for the work the team produces

Qualifications

  • Currently pursuing a Bachelor's, Masters, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for full-time employment in 2027
  • Proficiency in SystemVerilog
  • Deep knowledge of FPGA internals and/or ASIC 
  • Excellent digital logic design, optimization, debugging and problem solving skills
  • Thorough understanding of computer architecture and vendor tool suites
  • Familiarity with C++ and/or Python 
  • Comfortable working in a Linux environment
  • Previous internship experience in digital logic design
  • Expertise in networking protocols, CPU design, physical design, or machine learning accelerators is a big plus

Hardware Design and Verification at HRT

HRT hires for both design and verification roles. There is often overlap in skills, and both teams work together very closely. Design engineers typically have training in computer architecture and digital logic design, and they are primarily focused on creating hardware in SystemVerilog. Verification engineers typically have training in both digital logic and software engineering, and are primarily focused on building complex modeling and testing environments in Python and C++. If you are interested, you can view our Design Verification (DV) Engineer - 2027 Grads posting here.

We do not allow multiple applications. Please apply to the ONE role you are most interested in and we will consider you for all open positions when reviewing your application.

The estimated base salary range for this position is 300,000 USD per year (or local equivalent). The base pay offered may vary depending on multiple individualized factors, including location, job-related knowledge, skills, and experience. This role will also be eligible for discretionary performance-based bonuses and a competitive benefits package.