Digital logic design fundamentals. Demonstrated experience in translating functional requirements into synthesizable Verilog or SystemVerilog RTL. Knowledge of digital design flows such as RTL ...
Digital logic design fundamentals. Demonstrated experience in translating functional requirements into synthesizable Verilog or SystemVerilog RTL. Knowledge of digital design flows such as RTL ...
Logic Design Engineer
Santa Clara, CA · On-site
$140 - $210/hr
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Analyze complex digital design problems and propose architecture/micro-architecture solutions
Logic Design Engineer
Santa Clara, CA · On-site
$140 - $210/hr
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Analyze complex digital design problems and propose architecture/micro-architecture solutions
Logic Design Engineer
Santa Clara, CA · On-site
$145K/yr
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Analyze complex digital design problems and propose architecture/micro-architecture solutions
Logic Design Engineer
Santa Clara, CA · On-site
$145K/yr
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Analyze complex digital design problems and propose architecture/micro-architecture solutions
... Signal and Digital products. The intern will assist in developing, verifying, characterizing ... Development of FPGA systems using logic design and RTL coding. * Lab Debug of FPGA prototypes using ...
... Signal and Digital products. The intern will assist in developing, verifying, characterizing ... Development of FPGA systems using logic design and RTL coding. * Lab Debug of FPGA prototypes using ...
IP Logic Design Engineer
Rancho Cordova, CA · On-site
$105K - $164K/yr
... digital & analog blocks * Partner with product engineering and technology development teams to ... RTL design, logic synthesis, STA, ECO * Experience with lint tools, CDC/RDC analysis, and timing ...
IP Logic Design Engineer
Rancho Cordova, CA · On-site
$105K - $164K/yr
... digital & analog blocks * Partner with product engineering and technology development teams to ... RTL design, logic synthesis, STA, ECO * Experience with lint tools, CDC/RDC analysis, and timing ...
... digital & analog blocks * Partner with product engineering and technology development teams to ... RTL design, logic synthesis, STA, ECO * Experience with lint tools, CDC/RDC analysis, and timing ...
Quick apply
... digital & analog blocks * Partner with product engineering and technology development teams to ... RTL design, logic synthesis, STA, ECO * Experience with lint tools, CDC/RDC analysis, and timing ...
... Signal and Digital products. The intern will assist in developing, verifying, characterizing ... Development of FPGA systems using logic design and RTL coding. * Lab Debug of FPGA prototypes using ...
... Signal and Digital products. The intern will assist in developing, verifying, characterizing ... Development of FPGA systems using logic design and RTL coding. * Lab Debug of FPGA prototypes using ...
... Signal and Digital products. The intern will assist in developing, verifying, characterizing ... Development of FPGA systems using logic design and RTL coding. * Lab Debug of FPGA prototypes using ...
... Signal and Digital products. The intern will assist in developing, verifying, characterizing ... Development of FPGA systems using logic design and RTL coding. * Lab Debug of FPGA prototypes using ...
Logic Design Engineer
Santa Clara, CA · Hybrid
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Analyze complex digital design problems and propose architecture/micro-architecture solutions
Logic Design Engineer
Santa Clara, CA · Hybrid
We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed ... Analyze complex digital design problems and propose architecture/micro-architecture solutions
Wireless MAC Design Engineer
$184K - $324K/yr
Digital logic design fundamentals. Demonstrated experience in translating functional requirements into synthesizable Verilog or SystemVerilog RTL. Knowledge of digital design flows such as RTL ...
Wireless MAC Design Engineer
$184K - $324K/yr
Digital logic design fundamentals. Demonstrated experience in translating functional requirements into synthesizable Verilog or SystemVerilog RTL. Knowledge of digital design flows such as RTL ...
Senior Logic Design Engineer
Sunnyvale, CA · On-site
$170 - $250/hr
As a Digital Design Engineer, you will work in cooperation with other teams to define SoCs ... Experience in logic Synthesis * Strong analytical and problem-solving skills * Excellent written ...
Senior Logic Design Engineer
Sunnyvale, CA · On-site
$170 - $250/hr
As a Digital Design Engineer, you will work in cooperation with other teams to define SoCs ... Experience in logic Synthesis * Strong analytical and problem-solving skills * Excellent written ...
Digital IC Design Engineer
Santa Clara, CA · On-site
$160K/yr
A thorough understanding of digital logic design * Strong understanding of ASIC design flow from RTL to GDSII. * Familiarity with the Verilog language and simulators * A good understanding of analog ...
Digital IC Design Engineer
Santa Clara, CA · On-site
$160K/yr
A thorough understanding of digital logic design * Strong understanding of ASIC design flow from RTL to GDSII. * Familiarity with the Verilog language and simulators * A good understanding of analog ...
Staff Engineer, VLSI Design Engineering(Logic Design)
Milpitas, CA · On-site
$72 - $108/hr
Our group functions as a start-up within Western Digital, and offers a creative, fast paced ... Working knowledge of the entire Logic design flow from RTL to GDSII (RTL coding, simulation ...
New
Staff Engineer, VLSI Design Engineering(Logic Design)
Milpitas, CA · On-site
$72 - $108/hr
Our group functions as a start-up within Western Digital, and offers a creative, fast paced ... Working knowledge of the entire Logic design flow from RTL to GDSII (RTL coding, simulation ...
New
Wireless MAC Design Engineer
$129K - $225K/yr
Excellent understanding of digital logic design fundamentals. Ability to translate functional requirements into synthesizable Verilog or SystemVerilog RTL. Knowledge of digital design flows such as ...
Wireless MAC Design Engineer
$129K - $225K/yr
Excellent understanding of digital logic design fundamentals. Ability to translate functional requirements into synthesizable Verilog or SystemVerilog RTL. Knowledge of digital design flows such as ...
By submitting your resume, you acknowledge that your Digital Circuit Design internship application ... CMOS Logic Design and Transistor-Level Circuits, Timing and Delay Analysis, Standard Cell Design ...
By submitting your resume, you acknowledge that your Digital Circuit Design internship application ... CMOS Logic Design and Transistor-Level Circuits, Timing and Delay Analysis, Standard Cell Design ...
$143.80 - $230/hr
Serve as the central Chip Lead, defining top‑level digital architecture, partitioning hard/soft IP blocks, and owning the complete integration lifecycle. * Act as the bridge between Logic Design ...
$143.80 - $230/hr
Serve as the central Chip Lead, defining top‑level digital architecture, partitioning hard/soft IP blocks, and owning the complete integration lifecycle. * Act as the bridge between Logic Design ...
Senior Logic Design Engineer
Sunnyvale, CA · On-site
$170K - $250K/yr
As a Digital Design Engineer, you will work in cooperation with other teams to define SoCs ... Experience in logic Synthesis * Strong analytical and problem-solving skills * Excellent written ...
Senior Logic Design Engineer
Sunnyvale, CA · On-site
$170K - $250K/yr
As a Digital Design Engineer, you will work in cooperation with other teams to define SoCs ... Experience in logic Synthesis * Strong analytical and problem-solving skills * Excellent written ...
Own design of Ethernet and/or PCIe controller/PHY digital logic, ensuring compliance with relevant industry specifications. * Design and integrate memory sub-system IP, including DDR, HBM, and/or ...
Own design of Ethernet and/or PCIe controller/PHY digital logic, ensuring compliance with relevant industry specifications. * Design and integrate memory sub-system IP, including DDR, HBM, and/or ...
By submitting your resume, you acknowledge that your Digital Circuit Design internship application ... CMOS Logic Design and Transistor-Level Circuits, Timing and Delay Analysis, Standard Cell Design ...
By submitting your resume, you acknowledge that your Digital Circuit Design internship application ... CMOS Logic Design and Transistor-Level Circuits, Timing and Delay Analysis, Standard Cell Design ...
FPGA Design Engineer
Sunnyvale, CA · On-site
$144K - $198K/yr
As an FPGA Design Engineer , you will be responsible for the full lifecycle of FPGA designs - design, simulation, implementation, testing, and verification - for digital logic for high-data-rate ...
FPGA Design Engineer
Sunnyvale, CA · On-site
$144K - $198K/yr
As an FPGA Design Engineer , you will be responsible for the full lifecycle of FPGA designs - design, simulation, implementation, testing, and verification - for digital logic for high-data-rate ...
Internship Digital Logic Design information
What is an internship in digital logic design?
An Internship in Digital Logic Design is a temporary position for students or recent graduates to gain hands-on experience in designing and analyzing digital circuits and systems. Interns typically work with hardware description languages (such as VHDL or Verilog), simulation tools, and actual digital components to implement and test logic circuits. These internships provide practical exposure to the fundamentals of digital electronics, circuit design, and debugging, often as part of a larger engineering or computer science team. The experience is valuable for building skills required for careers in electronics, embedded systems, or hardware engineering.
What types of projects can I expect to work on during a digital logic design internship?
As a Digital Logic Design intern, you will typically work on projects involving designing, simulating, and testing digital circuits using hardware description languages like VHDL or Verilog. Interns often assist with creating and verifying logic blocks for FPGAs or ASICs, supporting senior engineers with debugging hardware, and documenting design processes. Depending on the company and team structure, you may also collaborate with software engineers or participate in regular design reviews, offering valuable opportunities to learn and contribute to real-world product development.
What are the key skills and qualifications needed to thrive as an internship in digital logic design, and why are they important?
To thrive as an intern in Digital Logic Design, a solid understanding of digital circuits, Boolean algebra, and basic electronics—usually gained through coursework in electrical or computer engineering—is essential. Familiarity with hardware description languages (such as VHDL or Verilog), simulation tools like ModelSim, and schematic capture software is typically expected. Strong problem-solving abilities, attention to detail, and effective teamwork skills make candidates stand out in this field. These competencies are crucial for efficiently designing, verifying, and implementing reliable digital systems in a collaborative engineering environment.
What is the difference between Internship Digital Logic Design vs Digital IC Design Engineer?
| Aspect | Internship Digital Logic Design | Digital IC Design Engineer |
|---|---|---|
| Credentials | Enrolled in or recent graduate in Electrical Engineering or related field | Bachelor's or Master's in Electrical Engineering, VLSI, or related |
| Work Environment | Academic or entry-level industry setting, supervised projects | Professional semiconductor or electronics company, full-time role |
| Responsibilities | Assisting in digital logic design, learning tools, supporting projects | Designing, simulating, and verifying digital integrated circuits |
| Industry Usage | Internship programs, early career exploration | Full-time employment in chip design companies |
Internship Digital Logic Design typically involves learning and assisting in digital logic projects during an educational or entry-level period, while Digital IC Design Engineer is a full-time professional role focused on designing and verifying complex digital integrated circuits in the semiconductor industry.
What are the most commonly searched types of Digital Logic Design jobs in California?
The most popular types of Digital Logic Design jobs in California are:
What are popular job titles related to Internship Digital Logic Design jobs in California?
For Internship Digital Logic Design jobs in California, the most frequently searched job titles are:
What job categories do people searching Internship Digital Logic Design jobs in California look for?
The top searched job categories for Internship Digital Logic Design jobs in California are:
What cities in California are hiring for Internship Digital Logic Design jobs?
Cities in California with the most Internship Digital Logic Design job openings:
Apple rating
8.1
Based on 681 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Job description
Come join Apple's wireless silicon development effort, with its emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically coordinated engineering team!
Description
Develop MAC layer design for wireless communication SoCs, including creating microarchitecture and other documents based on system-level requirements, and writing area- and power-efficient RTL that is scalable. Work with systems and software teams to ensure performance and power efficiency. Collaborate with verification and emulation teams on debug, test plan review and code coverage closure. Run tools to ensure lint and CDC/RDC clean design. Work with synthesis team to review constraints, close timing and review area/timing reports.
Minimum Qualifications
BS in Electrical Engineering, Computer Engineering, or a related field, and 10+ years of relevant industry experience.
Digital logic design fundamentals.
Demonstrated experience in translating functional requirements into synthesizable Verilog or SystemVerilog RTL.
Knowledge of digital design flows such as RTL simulation and debug, synthesis, lint, STA, and LEC.
Ability to design multi-clock-domain logic and resolve CDC problems.
Preferred Qualifications
10+ years of experience in ASIC microarchitecture and RTL design.
Excellent organization skills.
Excellent communication skills - both written and oral.
Understanding wireless standards, such as IEEE 802.11, 802.15, Bluetooth or 3GPP.
Understanding of ASIC low power design techniques, e.g. multiple supply domains configuration and management, dynamic power/clock scaling and power analysis is a plus.
Description
Develop MAC layer design for wireless communication SoCs, including creating microarchitecture and other documents based on system-level requirements, and writing area- and power-efficient RTL that is scalable. Work with systems and software teams to ensure performance and power efficiency. Collaborate with verification and emulation teams on debug, test plan review and code coverage closure. Run tools to ensure lint and CDC/RDC clean design. Work with synthesis team to review constraints, close timing and review area/timing reports.
Minimum Qualifications
BS in Electrical Engineering, Computer Engineering, or a related field, and 10+ years of relevant industry experience.
Digital logic design fundamentals.
Demonstrated experience in translating functional requirements into synthesizable Verilog or SystemVerilog RTL.
Knowledge of digital design flows such as RTL simulation and debug, synthesis, lint, STA, and LEC.
Ability to design multi-clock-domain logic and resolve CDC problems.
Preferred Qualifications
10+ years of experience in ASIC microarchitecture and RTL design.
Excellent organization skills.
Excellent communication skills - both written and oral.
Understanding wireless standards, such as IEEE 802.11, 802.15, Bluetooth or 3GPP.
Understanding of ASIC low power design techniques, e.g. multiple supply domains configuration and management, dynamic power/clock scaling and power analysis is a plus.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976