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Internship Computer Chip Engineer Jobs in Chicago, IL

Danaher

Software Engineer Internships

Aurora, IL · On-site

... in Computer Science, Software Engineering, Biomedical Engineering (with computational focus), or related field * Preference for students who have completed 3+ years of coursework by the internship ...

Danaher

Software Engineer Internships

Hammond, IN · On-site

... in Computer Science, Software Engineering, Biomedical Engineering (with computational focus), or related field * Preference for students who have completed 3+ years of coursework by the internship ...

Danaher

Software Engineer Internships

Gary, IN · On-site

... in Computer Science, Software Engineering, Biomedical Engineering (with computational focus), or related field * Preference for students who have completed 3+ years of coursework by the internship ...

Danaher

Software Engineer Internships

Chicago, IL · On-site

... in Computer Science, Software Engineering, Biomedical Engineering (with computational focus), or related field * Preference for students who have completed 3+ years of coursework by the internship ...

Gelber Group

Computer Networking Intern

Chicago, IL

$15.50 - $20.50/hr

IT Network/Infrastructure Internship What we are looking for: Gelber Group is looking for a ... System engineering (switches, routers, firewalls, servers) - Various operating systems (Linux ...

Coilcraft

Controls Engineer

Cary, IL · On-site

$85K - $115K/yr

... chip inductors, power magnetics, and filters. Our headquarters are located in Cary, Illinois. We ... Proficient in using Microsoft Office for documentation. * CAD experience for schematic ...

Gelber Group

Computer Networking Intern

Chicago, IL · On-site

$15.50 - $20.50/hr

IT Network/Infrastructure Internship What we are looking for: Gelber Group is looking for a ... System engineering (switches, routers, firewalls, servers) - Various operating systems (Linux ...

Coilcraft

Controls Engineer

Cary, IL · On-site

$85K - $115K/yr

... chip inductors, power magnetics, and filters. Our headquarters are located in Cary, Illinois. We ... Proficient in using Microsoft Office for documentation. * CAD experience for schematic ...

Coilcraft

Controls Engineer

Cary, IL · On-site

$84K - $109K/yr

... chip inductors, power magnetics, and filters. Our headquarters are located in Cary, Illinois. We ... Proficient in using Microsoft Office for documentation. * CAD experience for schematic ...

Schnabel

Construction and Engineering Internship

Cary, IL

$17 - $22/hr

This role reports directly to a Schnabel Engineer. You will also have a mentor that will dedicate ... Computer literacy and experience with Microsoft Office products, such as excel, word, and outlook

Schnabel

Construction and Engineering Internship

Cary, IL

$17 - $22/hr

This role reports directly to a Schnabel Engineer. You will also have a mentor that will dedicate ... Computer literacy and experience with Microsoft Office products, such as excel, word, and outlook

RBN Chicago

Lead Software Engineer

Chicago, IL · On-site

Hire, mentor and manage software engineers and interns from the Computer Science department Coordinate development projects across distributed teams Actively engage with our R&D group to explore new ...

RBN

Lead Software Engineer

Chicago, IL

Hire, mentor and manage software engineers and interns from the Computer Science department Coordinate development projects across distributed teams Actively engage with our R&D group to explore new ...

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All JobsInternship Computer Chip Engineer JobsInternship Computer Chip Engineer Jobs in Chicago, IL

Internship Computer Chip Engineer information

See Chicago, IL salary details

$11

$19

$30

How much do internship computer chip engineer jobs pay per hour?

As of Jun 22, 2026, the average hourly pay for internship computer chip engineer in Chicago, IL is $19.90, according to ZipRecruiter salary data. Most workers in this role earn between $16.59 and $21.54 per hour, depending on experience, location, and employer.

What is the difference between Internship Computer Chip Engineer vs Entry-Level Computer Chip Engineer?

AspectInternship Computer Chip EngineerEntry-Level Computer Chip Engineer
QualificationsCurrently enrolled or recent graduate, some coursework in electrical engineering or computer engineeringBachelor's degree in electrical/computer engineering or related field
Work EnvironmentInternship programs, supervised tasks, learning-focusedFull-time professional role, project responsibilities
Employer & IndustryTech companies, semiconductor firms, research labsSemiconductor companies, tech firms, manufacturing

Internship Computer Chip Engineers are students or recent graduates gaining hands-on experience, often part-time or temporary. Entry-Level Computer Chip Engineers are full-time professionals responsible for designing and testing chips. Internships serve as a stepping stone, while entry-level roles involve more responsibility and independence in the industry.

What are the most commonly searched types of Computer Chip Engineer jobs in Chicago, IL? The most popular types of Computer Chip Engineer jobs in Chicago, IL are:
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What cities near Chicago, IL are hiring for Internship Computer Chip Engineer jobs? Cities near Chicago, IL with the most Internship Computer Chip Engineer job openings:
Internship Computer Chip Engineer jobs near you
Agentic AI Engineer

Agentic AI Engineer

Cadence Design Systems Inc.

Cary, IL • On-site

Full-time

This job post has expired today. Applications are no longer accepted.

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Agentic AI Engineer

Role Summary

Cadence is hiring early-career Agent AI Engineers to join our applied AI team building agentic systems for silicon design. You will work alongside senior AI engineers and chip-design domain experts on the core technical pillars of Cadence's agentic stack: training and adapting models for engineering tasks, engineering high-quality design context (RAG, prompt scaffolds, retrieval pipelines), and tuning the knowledge graphs and vector/graph databases that ground our agents. From day one you will be writing production code that lands in customer-facing AI products and directly accelerates how the world designs chips.

What You Will Do

  • Model Development. Train, fine-tune, distill, and evaluate LLMs / SLMs and embedding models for EDA-specific tasks. Hands-on with LoRA / PEFT, instruction tuning, preference optimization (DPO/GRPO), and rigorous eval harnesses for code and reasoning.
  • Design Context Engineering. Build the retrieval pipelines, prompt scaffolds, and tool-calling specs that feed Cadence agents the right design context (RTL, scripts, logs, reports, methodology docs) at the right token budget. Optimize for accuracy, latency, and cost.
  • Knowledge Graph & Database Tuning. Design schemas, tune ingestion, and optimize queries for graph DBs (Neo4j, ArangoDB, NebulaGraph) and vector stores (Qdrant, Weaviate, pgvector, Chroma). Keep retrieval fast, accurate, and scoped to the right design hierarchy.
  • Agent Building Blocks. Implement and harden agent tools, memory, multi-hop reasoning patterns, and guardrails. Triage production failures and iterate.
  • Data Pipelines. Curate, clean, and label datasets from EDA artifacts (RTL, waveforms, logs, reports, schematics). Build synthetic-data and self-improvement loops where appropriate.
  • Evaluation & Telemetry. Build offline benchmarks and online metrics. Help define what 'good' looks like for chip-design agents and keep regressions out of main.
  • Collaborate & Learn. Pair with senior AI engineers, BU teams, and silicon domain experts. Learn the EDA flow as you go - we'll invest in you if you invest in the craft.

Must-Have Qualifications

  • BS / MS / PhD in CS, EE, ECE, AI/ML, or a closely related field (graduating in 2025-2026; recent grads also welcome).
  • Strong fundamentals in deep learning, transformers, and modern LLM mechanics (attention, tokenization, context windows, decoding).
  • Practical hands-on experience (coursework, internships, OSS, or serious side projects) with at least TWO of: LLM fine-tuning, RAG / retrieval, agentic frameworks, knowledge graphs, vector databases.
  • Solid Python engineering: comfortable with PyTorch and Hugging Face; writes clean, tested, version-controlled code.
  • Curiosity about silicon / chip design and willingness to learn a deep technical domain on the job.
  • Strong written and verbal communication; bias to ship working code over perfect plans.

Nice-to-Have / Bonus

  • Prior internship in AI/ML at a product company or research lab with shipped artifacts.
  • Hands-on with at least one agentic framework: LangGraph, AutoGen, Cursor SDK, Claude Code, MCP-based tool-calling stacks.
  • Experience with graph DBs (Neo4j, ArangoDB, NebulaGraph) and / or vector DBs (Qdrant, Weaviate, pgvector, Chroma, Milvus).
  • ML systems / infra exposure: vLLM, TGI, Triton, distributed training, GPU performance tuning, quantization.
  • Coursework or projects in compilers, formal methods, hardware description languages (Verilog/SystemVerilog/Chisel), or EDA tools.
  • Publications, OSS contributions, or competitive ML records (Kaggle medals, MLPerf, agent benchmarks, hackathon wins).
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