The roles Our chip simulation and tooling role will co-design, develop, and test simulations of our ... We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have
Quick apply
The roles Our chip simulation and tooling role will co-design, develop, and test simulations of our ... We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have
Quick apply
The roles Our chip simulation and tooling role will co-design, develop, and test simulations of our ... We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have
The roles Our chip simulation and tooling role will co-design, develop, and test simulations of our ... We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have
The roles Our chip simulation and tooling role will co-design, develop, and test simulations of our ... We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have
Santa Clara, CA · On-site
$19.75 - $25.50/hr
D. Engineering internship application will be processed in accordance with NVIDIA's Applicant ... Chip-level and System-level Architecture GPU and Multi-GPU Architecture Scalable memory systems and ...
Santa Clara, CA · On-site
$19.75 - $25.50/hr
D. Engineering internship application will be processed in accordance with NVIDIA's Applicant ... Chip-level and System-level Architecture GPU and Multi-GPU Architecture Scalable memory systems and ...
Santa Clara, CA · On-site
$19.75 - $25.50/hr
D. Engineering internship application will be processed in accordance with NVIDIA's Applicant ... Chip-level and System-level Architecture GPU and Multi-GPU Architecture Scalable memory systems and ...
Santa Clara, CA · On-site
$19.75 - $25.50/hr
D. Engineering internship application will be processed in accordance with NVIDIA's Applicant ... Chip-level and System-level Architecture GPU and Multi-GPU Architecture Scalable memory systems and ...
$19.75 - $25.50/hr
D. Engineering internship application will be processed in accordance with NVIDIA's Applicant ... Chip-level and System-level Architecture GPU and Multi-GPU ArchitectureScalable memory systems and ...
$19.75 - $25.50/hr
D. Engineering internship application will be processed in accordance with NVIDIA's Applicant ... Chip-level and System-level Architecture GPU and Multi-GPU ArchitectureScalable memory systems and ...
D. Research Computer Architecture and Systems internship application will be processed in ... Chip-level and System-level Architecture GPU and Multi-GPU Architecture Scalable memory systems and ...
D. Research Computer Architecture and Systems internship application will be processed in ... Chip-level and System-level Architecture GPU and Multi-GPU Architecture Scalable memory systems and ...
D. Research Computer Architecture and Systems internship application will be processed in ... Chip-level and System-levelArchitecture GPU and Multi-GPU Architecture Scalable memory systemsand ...
D. Research Computer Architecture and Systems internship application will be processed in ... Chip-level and System-levelArchitecture GPU and Multi-GPU Architecture Scalable memory systemsand ...
D. Research Computer Architecture and Systems internship application will be processed in ... Chip-level and System-level Architecture GPU and Multi-GPU Architecture Scalable memory systems and ...
D. Research Computer Architecture and Systems internship application will be processed in ... Chip-level and System-level Architecture GPU and Multi-GPU Architecture Scalable memory systems and ...
The Opportunity We're looking for high-agency graduate interns who want to help us solve meaningful ... Chip, Lightning in a Bottle, San Jose Earthquakes, among many others.
The Opportunity We're looking for high-agency graduate interns who want to help us solve meaningful ... Chip, Lightning in a Bottle, San Jose Earthquakes, among many others.
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Irvine, CA · On-site
$40/hr
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Irvine, CA · On-site
$40/hr
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Palo Alto, CA · On-site
$40/hr
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Palo Alto, CA · On-site
$40/hr
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Irvine, CA · On-site
$40/hr
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Irvine, CA · On-site
$40/hr
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Course or internship experience related to the following areas could be required: * RTL Design and HDL, Digital Systems, Digital Design, VLSI Design, RTL Design, Chip Blueprint, Timing and Static ...
Course or internship experience related to the following areas could be required: * RTL Design and HDL, Digital Systems, Digital Design, VLSI Design, RTL Design, Chip Blueprint, Timing and Static ...
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Palo Alto, CA · On-site
$40/hr
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Palo Alto, CA · On-site
$40/hr
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
... chip design and development, you are a great candidate! Aerospace experience is not required to be ... Internships are available with a variety of silicon engineering teams across the company at Irvine ...
Course or internship experience related to the following areas could be required: RTL Design and HDL, Digital Systems, Digital Design, VLSI Design, RTL Design, Chip Blueprint, Timing and Static ...
Course or internship experience related to the following areas could be required: RTL Design and HDL, Digital Systems, Digital Design, VLSI Design, RTL Design, Chip Blueprint, Timing and Static ...
Course or internship experience related to the following areas could be required: * RTL Design and HDL, Digital Systems, Digital Design, VLSI Design, RTL Design, Chip Blueprint, Timing and Static ...
Course or internship experience related to the following areas could be required: * RTL Design and HDL, Digital Systems, Digital Design, VLSI Design, RTL Design, Chip Blueprint, Timing and Static ...
| Aspect | Internship Chip | Data Analyst |
|---|---|---|
| Required Credentials | Typically pursuing or recent graduate, some technical skills | Bachelor's degree in related field, some certifications |
| Work Environment | Temporary, learning-focused, entry-level | Full-time, professional setting, analytical tasks |
| Employer & Industry Usage | Internships offered by tech, finance, marketing firms | Companies across industries, including tech, finance, healthcare |
| Search & Comparison Intent | Looking for entry-level, learning opportunities | Seeking professional, ongoing data analysis roles |
The main difference between Internship Chip and Data Analyst is that the internship is a temporary, learning-focused position for students or recent graduates, while a Data Analyst is a full-time professional role requiring more experience and skills. Internships serve as a stepping stone into the industry, whereas Data Analysts perform ongoing data interpretation and reporting tasks in a professional setting.
The most popular types of Chip jobs in California are:
For Internship Chip jobs in California, the most frequently searched job titles are:
The top searched job categories for Internship Chip jobs in California are:
Cities in California with the most Internship Chip job openings:

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Re-posted 9 days ago
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
The roles
Our chip simulation and tooling role will co-design, develop, and test simulations of our custom hardware and tools that engineers use to analyze those systems. You will be working at the cutting edge of hardware innovation, closely coordinating with both software and hardware teams across their whole development path. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.
Proficiency in C/C++ or Rust
Strong fundamentals in data structures and algorithms
Strong understanding of low-level software engineering
Strong understanding of hardware/software co-design
Excellent communication and collaboration skills
Strong candidates may also have (Nice to have qualifications)
Experience with Linux internals, kernel development, or driver debugging
Experience with hardware diagnostics or interpreting hardware logs
Exposure to server virtualization or CI/CD pipelines
Experience with Rust or embedded development
We encourage you to apply even if you do not believe you meet every qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.