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Internship Chip Manufacturing Jobs in Riverside, CA

Marvell

HSIO Test Solutions Engineering Lead

Irvine, CA · On-site

$51 - $69.50/hr

TSE drives pre-silicon test strategy, DFT requirements, manufacturing test planning, and test chip ... every stage - from internship to retirement and through life's most important moments. Our ...

All JobsChip Manufacturing JobsInternship Chip Manufacturing JobsInternship Chip Manufacturing Jobs in Riverside, CA

Internship Chip Manufacturing information

See Riverside, CA salary details

$11

$20

$27

How much do internship chip manufacturing jobs pay per hour?

As of Aug 23, 2026, the average hourly pay for internship chip manufacturing in Riverside, CA is $20.08, according to ZipRecruiter salary data. Most workers in this role earn between $17.07 and $22.31 per hour, depending on experience, location, and employer.

What is an internship chip manufacturing position?

Internship chip manufacturing positions are temporary roles designed for students or recent graduates to gain hands-on experience in the semiconductor industry. Interns typically work alongside engineers and technicians to learn about processes such as wafer fabrication, testing, and assembly of microchips. These positions provide practical exposure to manufacturing environments, advanced equipment, and industry-standard practices. Interns may assist in quality control, process optimization, or research and development projects, helping them build skills relevant to a career in chip manufacturing.

What types of projects or tasks do interns typically work on in chip manufacturing roles?

Interns in chip manufacturing are often involved in hands-on tasks such as supporting process improvement initiatives, assisting with quality control analysis, collecting and interpreting production data, and participating in equipment maintenance or calibration. They may also collaborate with engineers and technicians on troubleshooting manufacturing issues or optimizing fabrication processes. This exposure provides a practical understanding of semiconductor manufacturing workflows and the chance to contribute meaningful work to the production team.

What are the key skills and qualifications needed to thrive as an intern in chip manufacturing, and why are they important?

To thrive as an intern in chip manufacturing, a solid background in electrical engineering, materials science, or a related field is essential, often supported by relevant coursework or academic projects. Familiarity with CAD tools, semiconductor fabrication equipment, and basic data analysis software is typically expected. Attention to detail, eagerness to learn, and strong teamwork skills make candidates stand out in this hands-on environment. These abilities are crucial for ensuring precise work, adapting to rapidly evolving technologies, and contributing effectively to complex manufacturing processes.

What is the difference between Internship Chip Manufacturing vs Chip Manufacturing Engineer?

AspectInternship Chip ManufacturingChip Manufacturing Engineer
CredentialsEnrolled in or recent graduate of engineering or technical programsBachelor's or higher in Electrical, Mechanical, or Materials Engineering
Work EnvironmentInternship programs in manufacturing facilities or R&D labsFull-time roles in semiconductor fabrication plants or design offices
ResponsibilitiesAssisting with manufacturing processes, learning equipment operationDesign, optimize, and troubleshoot manufacturing processes
Industry UsageUsed as a training and entry point for studentsCore role in production and process improvement

Internship Chip Manufacturing provides hands-on learning experience for students, focusing on assisting with manufacturing tasks. In contrast, Chip Manufacturing Engineers hold full-time roles responsible for designing and improving manufacturing processes, requiring more advanced credentials and experience.

What job categories do people searching Internship Chip Manufacturing jobs in Riverside, CA look for?

The top searched job categories for Internship Chip Manufacturing jobs in Riverside, CA are:

What cities near Riverside, CA are hiring for Internship Chip Manufacturing jobs?

Cities near Riverside, CA with the most Internship Chip Manufacturing job openings:

Internship Chip Manufacturing jobs near you
Infographic showing various Internship Chip Manufacturing job openings in Riverside, CA as of August 2026, with employment types broken down into 84% Full Time, 9% Part Time, 1% Temporary, 4% Contract, and 2% Nights. Highlights an 96% Physical, 1% Hybrid, and 3% Remote job distribution, with an average salary of $41,765 per year, or $20.1 per hour.

HSIO Test Solutions Engineering Lead

Marvell

Irvine, CA • On-site

$51 - $69.50/hr

Full-time

Life, Retirement

Posted 12 days ago

Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's Test Solutions Engineering (TSE) organization is seeking an experienced HSIO Test Solutions Engineering Lead to help define how next-generation silicon products are tested from architectural concept through high-volume manufacturing.
TSE drives pre-silicon test strategy, DFT requirements, manufacturing test planning, and test chip validation. Partnering closely with Design, Validation, Product Engineering, and Test Engineering teams, TSE ensures products are architected for testability and equipped with the coverage, observability, and diagnostics required for successful product introduction, manufacturing ramp, and long-term quality.
Working at the forefront of advanced SerDes, chiplet, die-to-die, and mixed-signal technologies, you'll help solve some of the industry's most challenging test and characterization problems while influencing products long before they reach production.

What You Can Expect

Required Qualifications
  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, Physics, or related field.
  • 10+ years of experience in semiconductor Test Engineering, Product Engineering, DFT, Silicon Validation, or related disciplines.
  • Strong understanding of semiconductor manufacturing, yield analysis, and qualification methodologies.
  • Demonstrated ability to lead complex cross-functional technical initiatives.
Experience in one or more of the following areas:
  • High-speed SerDes technologies (56G, 112G, 224G and beyond)
  • PCIe, CXL, UCIe, or die-to-die interfaces
  • Design-for-Test (DFT)
  • Silicon validation and debug
  • Automated Test Equipment (ATE)
  • Production test development
  • Mixed-signal characterization and correlation
Preferred Qualifications
  • MS or PhD in Electrical Engineering, Computer Engineering, or related field.
  • Experience with Advantest 93K and/or Teradyne UltraFLEX platforms.
  • Experience with advanced packaging, chiplets, and heterogeneous integration technologies.
  • Experience supporting AI, networking, cloud, or data center products.
  • Python, automation, analytics, or test infrastructure development experience.

What We're Looking For

What You'll DoDefine Test Strategy and DFT Architecture
  • Develop test strategies and DFT requirements for advanced HSIO technologies.
  • Influence product testability, observability, and diagnostics during architecture and design phases.
  • Drive test planning and validation for next-generation SerDes, chiplet, and die-to-die architectures.
Lead Test Chip and Silicon Validation
  • Define and execute validation strategies for test chips and first-silicon bring-up.
  • Characterize IP and subsystem functionality across voltage, frequency, and temperature conditions.
  • Correlate validation results with manufacturing test requirements.
Enable Manufacturing Readiness
  • Develop production screening methodologies and manufacturing test plans.
  • Collaborate with Product Engineering and Test Engineering teams to enable production deployment.
  • Analyze production data and drive improvements in quality, yield, and test efficiency.
Drive Technical Leadership
  • Partner with Architecture, Design, DFT, Validation, Product Engineering, Reliability, and Manufacturing teams.
  • Lead cross-functional reviews and influence key technical decisions.
  • Mentor engineers and contribute to next-generation test methodologies and best practices.

Expected Base Pay Range (USD)

138,400 - 204,800, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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