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Internship Asic Rtl Design Engineer Jobs in Springfield, VA

Sparton Corporation

FPGA Developer

Fairfax, VA · On-site

$94K - $156K/yr

... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...

Rocket Lab Corporation

Sr. FPGA Engineer II

Chantilly, VA

$107K - $146K/yr

... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...

Rocket Lab Corporation

Sr. FPGA Engineer II

Chantilly, VA · On-site

$107K - $146K/yr

... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...

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Internship Asic Rtl Design Engineer information

See Springfield, VA salary details

$98.2K

$156.9K

$211K

How much do internship asic rtl design engineer jobs pay per year?

As of Aug 19, 2026, the average yearly pay for internship asic rtl design engineer in Springfield, VA is $156,883.00, according to ZipRecruiter salary data. Most workers in this role earn between $137,400.00 and $188,000.00 per year, depending on experience, location, and employer.

What is an internship ASIC RTL design engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What does an internship ASIC RTL design engineer do?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an internship ASIC RTL design engineer?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

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For Internship Asic Rtl Design Engineer jobs in Springfield, VA, the most frequently searched job titles are:

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Internship Asic Rtl Design Engineer jobs near you
Infographic showing various Internship Asic Rtl Design Engineer job openings in Springfield, VA as of August 2026, with employment types broken down into 71% Full Time, and 29% Contract. Highlights an 74% In-person, and 26% Remote job distribution, with an average salary of $156,883 per year, or $75.4 per hour.

Senior FPGA Engineer, Cyber

Anduril Industries

Washington, DC • On-site

$166K - $220K/yr

Other

Posted 14 days ago

Anduril rating

9.1

Company rating: 9.1 out of 10

Anduril

Based on 17 frontline employees who took The Breakroom Quiz

7.4

Company rating compared to similar companies: 7.4 out of 10

Manufacturers average

Based on 75,610 frontline employees who took The Breakroom Quiz

Job description

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years.
ABOUT THE TEAM
Anduril Cyber is focused on positioning Anduril as a lead provider of capabilities to enable offensive cyber missions. Cyber is a new business line at Anduril, and relies upon our fleet of autonomous vehicles, Lattice operating system, mesh networks, and other hardware products to engage in cyber operations at the edge. We design and build novel solutions to deploy cyber capabilities in unconventional or difficult to reach environments Anduril Cyber is hiring a Software Engineer focused on embedded and mission software integration. Strong candidates may lean more heavily toward embedded-platform or mission/backend work, but should be comfortable collaborating across adjacent layers that connect devices, operators, and data products.
ABOUT THE JOB
Anduril Cyber is hiring an FPGA Engineer with deep experience in high-throughput FPGA/SoC digital design, precision timing, and hardware/software integration. The role is defined around the technical depth and execution patterns reflected in the hiring plan and representative resume set without assuming a fixed silicon choice this early.
  • Design and implement high-throughput FPGA datapaths, packetization pipelines, timing-sensitive interfaces, and hardware-near acceleration blocks.
  • Own RTL design, simulation, verification, and lab bring-up across VHDL, Verilog, or SystemVerilog-based workflows.
  • Work closely with DSP, software, hardware, and systems engineers to turn algorithm and interface requirements into robust FPGA implementations.
  • Drive precision timing, synchronization, and throughput closure for the selected FPGA/SoC platform and adjacent high-speed digital interfaces.
  • Document architectures, interfaces, and verification approaches clearly enough for cross-functional integration and long-term maintainability.
  • Support design reviews, technical trade studies, and lab debugging with a hands-on, player-coach engineering mindset.
REQUIRED QUALIFICATIONS
  • Strong experience with FPGA development on Xilinx or comparable platforms, including SoC/MPSoC-based or other high-performance digital devices relevant to SDR systems.
  • Proficiency in VHDL, Verilog, or SystemVerilog, including simulation, timing closure, and resource/performance tradeoffs.
  • Experience building high-speed digital interfaces and datapaths such as Ethernet-based packet movement, DMA-adjacent flows, or streaming signal pipelines.
  • Hands-on familiarity with precision timing, synchronization, sysref/clocking concepts, and deterministic interface behavior.
  • Experience with FPGA verification methodologies and automation, including regression-oriented testbenches and CI-backed validation.
  • Ability to collaborate effectively with software and DSP engineers on register interfaces, control surfaces, and integration boundaries.
  • Comfort debugging in the lab using oscilloscopes, logic analyzers, spectrum analyzers, or related instrumentation.
  • Strong written and verbal communication skills for technical design reviews and cross-functional engineering work
PREFERRED QUALIFICATIONS
  • Experience with cocotb, GitLab CI/CD, or similar automation for FPGA verification and release confidence.
  • Background in FFT/channelization pipelines, PSD generation, AGC-adjacent blocks, or other signal-processing-oriented FPGA implementations.
  • Familiarity with embedded software interfaces to FPGA systems, including Linux-based control planes and hardware/software co-debug.
  • Experience presenting architecture and implementation details in customer-facing or formal design-review settings.
  • Track record of mentoring other engineers and improving design quality across a broader FPGA/DSP team.

US Salary Range
$166,000-$220,000 USD
The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full time offers; and are considered part of Anduril's total compensation package. Additionally, Anduril offers top-tier benefits for full-time employees, including:
Benefits
At Anduril, we invest in our people. Our comprehensive, competitive benefits package (available at little to no cost to employees) ensures you're supported in health, recovery, and whatever comes next. For more information, Explore Our Benefits.
Protecting Yourself from Recruitment Scams
Anduril is committed to maintaining the integrity of our Talent acquisition process and the security of our candidates. We've observed a rise in sophisticated phishing and fraudulent schemes where individuals impersonate Anduril representatives, luring job seekers with false interviews or job offers. These scammers often attempt to extract payment or sensitive personal information.
To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind:
  • No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process. Our legitimate recruitment is entirely free for candidates.
  • Please always verify communications:
    • Direct from Anduril: If you receive an email from one of our recruiters, it will only come from an @anduril.com address.
    • Via Agency Partner: If contacted by a recruiting agency for an Anduril role, their email will clearly identify their agency. If you suspect any suspicious activity, please verify the agency's authenticity by reaching out to
  • Exercise Caution with Unsolicited Outreach: If you receive any communication that appears suspicious, contains grammatical errors, or makes unusual requests, do not engage. Always confirm the sender's email domain is @anduril.com before providing any personal information or clicking on links.
  • What to Do If You Suspect Fraud: Should you encounter any questionable or fraudulent outreach claiming to be from Anduril, please report it immediately to Your proactive caution is invaluable in protecting your personal information and upholding the security and trustworthiness of our recruitment efforts.

Data Privacy
To view Anduril's candidate data privacy policy, please visit
By submitting your application, you consent to Anduril Industries using a third-party service provider to conduct pre-employment risk, integrity, and due diligence screening and assessing potential risks as part of your application process. This third-party service provider provides risk-intelligence services that may include analysis of sanctions and watchlists, adverse media, public-record information, and other lawful open-source or commercial data sources. This third-party service provider does not act as a consumer reporting agency. Use of this provider helps to ensure compliance with applicable laws and protect technology, intellectual property, and organizational security.

Working at Anduril

About Anduril, in their own words

From Anduril

As the world enters an era of strategic competition, Anduril delivers cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the warfighter in months, not years.

What Anduril employees say

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Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

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About Anduril Industries

Sourced by ZipRecruiter

Anduril Industries is a trailblazer in the technology industry based in Costa Mesa, CA, US. Founded in 2017 by Palmer Luckey, the creator of Oculus VR, the company focuses on developing innovative technology to equip and empower those in the defense sector. Its primary products include cutting-edge autonomous systems and AI software that assist in combating threats to national and global security. The mission of Anduril Industries is to integrate technology and defense by building transformative, scalable solutions that ensure a safer world.

Industry

Guided missile and space vehicle manufacturing

Company size

501 - 1,000 Employees

Headquarters location

Costa Mesa, CA, US

Year founded

2017

Social media

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