Eager to learn with strong memory retention skills * Ability to work well in a team environment ... Computer programming / coding a plus Key learning objectives of the program: * Use Cadence Virtuoso ...
Eager to learn with strong memory retention skills * Ability to work well in a team environment ... Computer programming / coding a plus Key learning objectives of the program: * Use Cadence Virtuoso ...
An opening exists for Tech Staff/Sr. Staff IO Design Engineer with an interest in developing the next generation of storage and memory controller SoC products. This will involve taking a design from ...
An opening exists for Tech Staff/Sr. Staff IO Design Engineer with an interest in developing the next generation of storage and memory controller SoC products. This will involve taking a design from ...
Senior IO Design Engineer - Lead Next‑Gen Storage SoC (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
The role focuses on developing high-performance storage and memory controller SoC products ... S in Electrical Engineering and 12+ years of relevant experience. Responsibilities include design ...
Senior IO Design Engineer - Lead Next‑Gen Storage SoC (Chandler)
Chandler, AZ · On-site
$102K - $140K/yr
The role focuses on developing high-performance storage and memory controller SoC products ... S in Electrical Engineering and 12+ years of relevant experience. Responsibilities include design ...
FPGAs * memory * industry interfaces, such as PCIe, Ethernet, I2C, SPI, and UART Qualifications You ... Minimum of 8 years of engineering digital circuit design experience to include at least 2 of the ...
FPGAs * memory * industry interfaces, such as PCIe, Ethernet, I2C, SPI, and UART Qualifications You ... Minimum of 8 years of engineering digital circuit design experience to include at least 2 of the ...
Memory * Industry interfaces, such as PCIe, Ethernet, I2C, SPI, and UART Qualifications You Must ... Minimum of 10 years of engineering digital circuit design experience to include the following:
Memory * Industry interfaces, such as PCIe, Ethernet, I2C, SPI, and UART Qualifications You Must ... Minimum of 10 years of engineering digital circuit design experience to include the following:
Systems Design Engineer - Communication & Sensing Systems- Government
Tempe, AZ · On-site
$149K - $224K/yr
... Systems Design Engineer. In this role, you will: * Support systemlevel build and analysis for ... Hands-on experience with digital hardware platforms (processors, memory, FPGAs, CPLDs ...
Systems Design Engineer - Communication & Sensing Systems- Government
Tempe, AZ · On-site
$149K - $224K/yr
... Systems Design Engineer. In this role, you will: * Support systemlevel build and analysis for ... Hands-on experience with digital hardware platforms (processors, memory, FPGAs, CPLDs ...
As a Process Engineer Intern at Amphenol Industrial Operations, you'll gain hands-on experience ... Contributing to project teams by supporting various design and process engineering tasks
As a Process Engineer Intern at Amphenol Industrial Operations, you'll gain hands-on experience ... Contributing to project teams by supporting various design and process engineering tasks
Process Engineer Intern
Mesa, AZ · On-site
$21/hr
As a Process Engineer Intern at Amphenol Industrial Operations, you'll gain hands-on experience ... Contributing to project teams by supporting various design and process engineering tasks
Process Engineer Intern
Mesa, AZ · On-site
$21/hr
As a Process Engineer Intern at Amphenol Industrial Operations, you'll gain hands-on experience ... Contributing to project teams by supporting various design and process engineering tasks
Senior Electrical Engineer - Digital Design
$103K - $139K/yr
... FPGAs, memory, and industry interfaces, such as PCIe, Ethernet, I2C, SPI, and UART. * Travel ... Minimum of 5 years of engineering digital circuit design experience Qualifications We Prefer
Senior Electrical Engineer - Digital Design
$103K - $139K/yr
... FPGAs, memory, and industry interfaces, such as PCIe, Ethernet, I2C, SPI, and UART. * Travel ... Minimum of 5 years of engineering digital circuit design experience Qualifications We Prefer
Marketing Design Intern - 2025 Summer Intern
Scottsdale, AZ · Remote
$15 - $20.25/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Scottsdale, AZ · Remote
$15 - $20.25/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Phoenix, AZ · Remote
$15 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Phoenix, AZ · Remote
$15 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Chandler, AZ · On-site
$14.75 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Chandler, AZ · On-site
$14.75 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Glendale, AZ · Remote
$15 - $20/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Glendale, AZ · Remote
$15 - $20/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Mesa, AZ · Remote
$15 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Mesa, AZ · Remote
$15 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Phoenix, AZ · On-site
$15 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Phoenix, AZ · On-site
$15 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Mesa, AZ · On-site
$15 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Mesa, AZ · On-site
$15 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Glendale, AZ · On-site
$15 - $20/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Glendale, AZ · On-site
$15 - $20/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Scottsdale, AZ · On-site
$15 - $20.25/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Scottsdale, AZ · On-site
$15 - $20.25/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Chandler, AZ · Remote
$14.75 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
Marketing Design Intern - 2025 Summer Intern
Chandler, AZ · Remote
$14.75 - $19.75/hr
Our data security posture management platform is engineered specifically to address modern data ... Design infographics that simplify complex data security concepts for various audiences * Produce ...
FPGA Digital Engineer - 2
Chandler, AZ · On-site
$87K - $130K/yr
As a FPGA Design Engineer, you will collaborate with experienced FPGA engineers and cross ... Exposure to Vitis Unified IDE and memory interface standards (DDR3/DDR4/DDR5). * Coursework or ...
FPGA Digital Engineer - 2
Chandler, AZ · On-site
$87K - $130K/yr
As a FPGA Design Engineer, you will collaborate with experienced FPGA engineers and cross ... Exposure to Vitis Unified IDE and memory interface standards (DDR3/DDR4/DDR5). * Coursework or ...
Intern Memory Design Engineer information
See Phoenix, AZ salary details
$9.07 - $11.56
9% of jobs
$11.56 - $14.06
8% of jobs
$14.71 is the 25th percentile. Wages below this are outliers.
$14.06 - $16.56
28% of jobs
The median wage is $17.22 / hr.
$16.56 - $19.05
16% of jobs
$20.76 is the 75th percentile. Wages above this are outliers.
$19.05 - $21.55
20% of jobs
$21.55 - $24.04
9% of jobs
$24.04 - $26.54
4% of jobs
$26.54 - $29.03
1% of jobs
$29.03 - $31.53
1% of jobs
$31.53 - $34.02
1% of jobs
$34.02 - $36.52
2% of jobs
$9
$19
$36
How much do intern memory design engineer jobs pay per hour?
What are some common challenges faced by an intern memory design engineer during their internship?
What does an intern memory design engineer do?
What are the key skills and qualifications needed to thrive as an intern memory design engineer, and why are they important?

Full-time
Posted 18 days ago
Analog Devices rating
8.5
Based on 17 frontline employees who took The Breakroom Quiz
33rd of 156 rated electronics manufacturers
Job description
ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future.
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.
Job Description:
The Automotive Solutions Group needs entry level computer draftsman interested in learning mask design for advanced analog and mixed-signal ICs. You will work as a team with layout designers and engineers, local and/or globally to complete full chip projects.
Responsibilities include all aspects of IC mask design from creating full chip floor plans, planning schedules, hookup, and verification to tape out. On the job training provided to develop your skills.
Minimum Qualifications:
- Comfortable with computers and working on a computer continuously as a full-time job.
- Good written and verbal communication skills
- Good puzzle solving skills
- Good spatial awareness skills
- Eager to learn with strong memory retention skills
- Ability to work well in a team environment
- Accepting of change that comes from innovation
- Detail-oriented
Preferred Qualifications:
- High school graduate or equivalent (General Education Diploma).
- At least eighteen years old.
- Computer programming / coding a plus
Key learning objectives of the program:
- Use Cadence Virtuoso Layout XL editor
- Generate high-quality placements.
- Carefully and methodically route sub-cells and blocks.
- Basic Power Fet metallization.
- LVS, DRC, Latchup and Antenna Verification using Calibre
- Gain ability to work on layouts independently.
- Basic proficiency using Linux
What are the key competencies required to be successful on the program?
- Comfortable with computers and working on a computer continuously as a full-time job.
- Good written and verbal communication skills
- Good puzzle solving skills
- Good spatial awareness skills
- Eager to learn with strong memory retention skills
- Ability to work well in a team environment
- Ability to embrace change
- Detail-oriented
- Schedule meetings with SLD's to ask questions and gain knowledge
- Spend time studying things you need to understand
Length of the program
6-month training period with a purpose of progressing in the Layout Career Path.
What training will be provided?
A class-style setting and seating arrangement with assignments and exams to show retention of learning. Multiple mentors to help give a well-rounded learning experience. Exams will not test beyond what has been taught.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: Graduate Job
Required Travel: No
What Analog Devices employees say
Pay
Benefits
Hours and flexibility
Workplace
Get the full story on Breakroom
About Analog Devices
Sourced by ZipRecruiter
Analog Devices (NASDAQ: ADI) designs and manufactures semiconductor products and solutions. We enable our customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.
Industry
Electrical equipment, appliance, and component manufacturing
Company size
5,001 - 10,000 Employees
Headquarters location
Norwood, MA, US
Year founded
1965