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Intern Memory Design Engineer Jobs in Oak Brook, IL

Wolverine

FPGA Design Engineer

Chicago, IL · On-site

$110K - $160K/yr

FPGA Design Engineer Department: Technology Employment Type: Full Time Location: Chicago, IL ... Experience with system-on-chip (SoC) architectures, memory & processor subsystems, and peripheral ...

Wolverine

FPGA Design Engineer

Chicago, IL

$110K - $160K/yr

Description Wolverine Trading is seeking an experienced FPGA design engineer to build high-speed ... Experience with system-on-chip (SoC) architectures, memory & processor subsystems, and peripheral ...

Wolverine Worldwide

FPGA Design Engineer

Chicago, IL

$110K - $160K/yr

Wolverine Trading is seeking an experienced FPGA design engineer to build high-speed, low latency ... Experience with system-on-chip (SoC) architectures, memory & processor subsystems, and peripheral ...

Orion Engineers, LLC

Design Staff Engineer

Chicago, IL · Hybrid

$70K - $95K/yr

Preparation of design computations, plans, specifications and quantity and cost estimates ... Intern experience in structural engineering required * 2-5 yrs of work experience in a engineering ...

PRAGMATIKE

CUDA Kernel Engineer

Chicago, IL · Remote

Design, implement, and optimize custom CUDA kernels for NVIDIA GPUs , with a focus on maximizing occupancy, memory throughput, and warp efficiency. * Profile GPU workloads using tools such as N sight ...

Syntiant

MEMS Engineering Intern

Itasca, IL

$14.50 - $19.50/hr

The MEMS Engineering Intern will be exposed to the design, simulation, test and analysis of MEMS ... memory footprint across a broad range of processors. The company is backed by several of the world ...

Syntiant

MEMS Engineering Intern

Itasca, IL · On-site

$14.50 - $19.50/hr

The MEMS Engineering Intern will be exposed to the design, simulation, test and analysis of MEMS ... memory footprint across a broad range of processors. The company is backed by several of the world ...

Syntiant

MEMS Engineering Intern

Itasca, IL · On-site

$14.50 - $19.50/hr

The MEMS Engineering Intern will be exposed to the design, simulation, test and analysis of MEMS ... memory footprint across a broad range of processors. The company is backed by several of the world ...

Cresset Capital

Graphic Design Intern

Chicago, IL · On-site

$25/hr

Participate in intern programming including lunch & learns and networking opportunities ... Exposure to brand systems and how design supports business growth * A portfolio of real-world ...

Cresset Capital

Graphic Design Intern

Chicago, IL

$25/hr

Participate in intern programming including lunch & learns and networking opportunities ... Exposure to brand systems and how design supports business growth * A portfolio of real-world ...

G-20 Group

Oracle Engineer

Chicago, IL · On-site

Role Overview We are hiring a motivated Oracle Engineer to join our team, a leading DeFi desk in ... cache-efficient memory design. * HSM Integration : Practical experience integrating hardware ...

G-20 Group

Oracle Engineer

Chicago, IL · On-site

Role Overview We are hiring a motivated Oracle Engineer to join our team, a leading DeFi desk in ... cache-efficient memory design. * HSM Integration : Practical experience integrating hardware ...

SWE Solutions

Construction Engineer Intern

Lombard, IL · On-site

$20 - $30/hr

The intern will assist in a variety of tasks related to the planning, execution, and documentation ... design plans, specifications, and safety standards. * Support engineers in preparing project ...

SWE Solutions

Construction Engineer Intern

Lombard, IL · On-site

$20 - $30/hr

The intern will assist in a variety of tasks related to the planning, execution, and documentation ... design plans, specifications, and safety standards. * Support engineers in preparing project ...

SWE Solutions

Construction Engineer Intern

Lombard, IL · On-site

$20 - $30/hr

The intern will assist in a variety of tasks related to the planning, execution, and documentation ... design plans, specifications, and safety standards. * Support engineers in preparing project ...

Syntiant

Product Management Intern

Itasca, IL · On-site

... Application Engineering, and Sales. * Organize and maintain Office 365 SharePoint document ... Syntiant's advanced chip solutions merge deep learning with semiconductor design to produce ultra ...

Syntiant

Product Management Intern

Itasca, IL · On-site

... Application Engineering, and Sales. * Organize and maintain Office 365 SharePoint document ... Syntiant's advanced chip solutions merge deep learning with semiconductor design to produce ultra ...

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How much do intern memory design engineer jobs pay per hour?

As of May 28, 2026, the average hourly pay for intern memory design engineer in Oak Brook, IL is $19.56, according to ZipRecruiter salary data. Most workers in this role earn between $14.57 and $21.83 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Intern Memory Design Engineer, and why are they important?

To thrive as an Intern Memory Design Engineer, you need a solid background in electrical engineering, digital/analog circuit design, and semiconductor fundamentals, often supported by ongoing or completed coursework toward a relevant degree. Familiarity with EDA tools such as Cadence, Synopsys, or Mentor Graphics, and basic knowledge of scripting languages like Python or TCL, are typically required. Strong analytical thinking, attention to detail, and effective communication set standout interns apart in collaborative engineering environments. These skills and qualities are crucial for designing reliable memory components and contributing efficiently to complex, team-driven projects.

What are some common challenges faced by an Intern Memory Design Engineer during their internship?

As an Intern Memory Design Engineer, you may encounter challenges such as understanding complex circuit design concepts and adapting to industry-standard Electronic Design Automation (EDA) tools. Working in this role often involves collaborating closely with experienced engineers and cross-functional teams to verify and optimize memory layouts for performance and reliability. Navigating the steep learning curve and balancing hands-on project work with ongoing training can be demanding, but these experiences are invaluable for building foundational skills and industry knowledge.

What does an Intern Memory Design Engineer do?

An Intern Memory Design Engineer assists in the design, development, and testing of computer memory components such as DRAM, SRAM, or Flash memory. They work closely with senior engineers to create circuit schematics, run simulations, analyze data, and help optimize memory performance. Interns may also participate in debugging and validation of memory products, learning industry-standard design tools and methodologies. This role provides valuable hands-on experience in semiconductor design and the opportunity to contribute to real-world projects.
What are the most commonly searched types of Memory Design Engineer jobs in Oak Brook, IL? The most popular types of Memory Design Engineer jobs in Oak Brook, IL are:
What job categories do people searching Intern Memory Design Engineer jobs in Oak Brook, IL look for? The top searched job categories for Intern Memory Design Engineer jobs in Oak Brook, IL are:
What cities near Oak Brook, IL are hiring for Intern Memory Design Engineer jobs? Cities near Oak Brook, IL with the most Intern Memory Design Engineer job openings:
Intern Memory Design Engineer jobs near you
Infographic showing various Intern Memory Design Engineer job openings in Oak Brook, IL as of May 2026, with employment types broken down into 80% Full Time, 10% Part Time, and 10% Contract. Highlights an 60% Physical, and 40% Remote job distribution, with an average salary of $40,676 per year, or $19.6 per hour.

FPGA Design Engineer

Wolverine

Chicago, IL • On-site

$110K - $160K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 16 days ago

Job description

FPGA Design Engineer
Department: Technology
Employment Type: Full Time
Location: Chicago, IL
Description
Wolverine Trading is seeking an experienced FPGA design engineer to build high-speed, low latency systems targeting trading applications. The position requires designing and implementing hardware-based solutions for systems through collaboration with traders and quantitative analysts. The applicant must be highly driven and possess strong analytical and interpersonal skills.
What You'll Do
  • Design and implement low-latency Hardware-based trading solutions
  • Collaborate with traders, quantitative analysts and low-level SW Engineers
  • Push performance boundaries on FPGAs
  • Analyze and resolve real-time system bottlenecks and issues and improve trading performance

What We're Looking For
  • Expert knowledge of SystemVerilog, FPGA design, and industry standard tools
  • Proficiency verifying designs through simulation and building verification environments
  • In-depth knowledge of advanced FPGA synthesis techniques and implementation constraints for high-speed timing closure
  • Experience with system-on-chip (SoC) architectures, memory & processor subsystems, and peripheral interconnects
  • Low level expertise in high speed Gb transceivers, MACs, and PHYs
  • Critical thinkers with ability to analyze complex, multi-variable systems
  • Degree in Electrical Engineering or Computer Engineering with a focus on digital systems or computer networks
  • Experience with schematic capture and PCB design and debug is a plus
  • 3+ years experience working with FPGA and/or ASIC designs required
  • No prior experience in the finance industry required

Why Join Us
Our flat organizational structure promotes teamwork across the Firm and offers easy access to senior staff. While we work exceptionally well as a team in the office, our bonds are further strengthened through company events, activities and giving back. Volleyball, soccer, hockey, 5K runs, picnic, parties, and trivia nights provide friendly competition and build better relationships. By getting out of our usual environment and doing out-of-the-ordinary things together, we foster creativity and broaden our imaginations to accomplish new challenges.
Benefits:
  • Highly competitive salary & bonus opportunity
  • Generous paid time off and flexible scheduling
  • 100% coverage of medical, dental, vision, life, and disability benefits for single coverage
  • Generous Paid Parental Leave
  • Retirement Plans: 401K and Roth 401K
  • Profit sharing plan
  • Long- and short-term disability

Additional Perks:
  • Free breakfast and lunch from our in-house kitchen with rotating menus (including snacks!)
  • On-site gym with a subsidized membership
  • Frequent company outings
  • Opportunity to give back to organizations that help individuals in need in the Chicagoland area

Professional Development:
  • In-house education team - classes and resources are offered for continuous learning opportunities
  • Mentorship Program through your first six months of employment

The base compensation range for this role is approximately $110,000-$160,000 contingent on experience. Wolverine Trading's total compensation model includes base salary and an annual discretionary bonus.

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