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Intern Memory Design Engineer Jobs in Cape Cod, MA

Raytheon

These design efforts will include collaboration with systems engineers, mechanical engineers ... Experience with various digital high-speed interfaces such as JESD204B, Memory (DDR3, DDR4), SERDES ...

New

Raytheon

Hardware Design Engineer II

Tewksbury, MA · On-site

These design efforts will include collaboration with systems engineers, mechanical engineers ... Experience with various digital high-speed interfaces such as JESD204B, Memory (DDR3, DDR4), SERDES ...

Raytheon

Hardware Design Engineer II

Tewksbury, MA

These design efforts will include collaboration with systems engineers, mechanical engineers ... Experience with various digital high-speed interfaces such as JESD204B, Memory (DDR3, DDR4), SERDES ...

Qorvo, Inc.

RFIC Design Engineer Intern

Chelmsford, MA · On-site

$31 - $42/hr

Final presentation to business leaders Qorvo's RFIC Design Engineering Internships are offered in our High Performance Analog, Advanced Cellular, and Connectivity and Sensors business groups.

Qorvo, Inc.

RFIC Design Engineer Intern

Chelmsford, MA · On-site

$31 - $42/hr

Final presentation to business leaders Qorvo's RFIC Design Engineering Internships are offered in our High Performance Analog, Advanced Cellular, and Connectivity and Sensors business groups.

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All JobsIntern Memory Design Engineer JobsIntern Memory Design Engineer Jobs in Cape Cod, MA

Intern Memory Design Engineer information

See Cape Cod, MA salary details

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How much do intern memory design engineer jobs pay per hour?

As of Sep 14, 2026, the average hourly pay for intern memory design engineer in Cape Cod, MA is $20.77, according to ZipRecruiter salary data. Most workers in this role earn between $15.48 and $23.17 per hour, depending on experience, location, and employer.

What does an intern memory design engineer do?

An Intern Memory Design Engineer assists in the design, development, and testing of computer memory components such as DRAM, SRAM, or Flash memory. They work closely with senior engineers to create circuit schematics, run simulations, analyze data, and help optimize memory performance. Interns may also participate in debugging and validation of memory products, learning industry-standard design tools and methodologies. This role provides valuable hands-on experience in semiconductor design and the opportunity to contribute to real-world projects.

What are the key skills and qualifications needed to thrive as an intern memory design engineer, and why are they important?

To thrive as an Intern Memory Design Engineer, you need a solid background in electrical engineering, digital/analog circuit design, and semiconductor fundamentals, often supported by ongoing or completed coursework toward a relevant degree. Familiarity with EDA tools such as Cadence, Synopsys, or Mentor Graphics, and basic knowledge of scripting languages like Python or TCL, are typically required. Strong analytical thinking, attention to detail, and effective communication set standout interns apart in collaborative engineering environments. These skills and qualities are crucial for designing reliable memory components and contributing efficiently to complex, team-driven projects.

What are some common challenges faced by an intern memory design engineer during their internship?

As an Intern Memory Design Engineer, you may encounter challenges such as understanding complex circuit design concepts and adapting to industry-standard Electronic Design Automation (EDA) tools. Working in this role often involves collaborating closely with experienced engineers and cross-functional teams to verify and optimize memory layouts for performance and reliability. Navigating the steep learning curve and balancing hands-on project work with ongoing training can be demanding, but these experiences are invaluable for building foundational skills and industry knowledge.

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Intern Memory Design Engineer jobs near you
Infographic showing various Intern Memory Design Engineer job openings in Cape Cod, MA as of September 2026, with employment types broken down into 1% Internship, 82% Full Time, 12% Part Time, and 5% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $43,205 per year, or $20.8 per hour.

Physical Design Engineer Intern, BS - Summer 2027

Westborough, MA • On-site

Marvell
Manufacturing • 10K+ employees
Learn more about Marvellexternal

Temporary, Internship

Medical, Dental, Vision, Retirement

Posted 9 days ago

Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's Physical Design teams span across multiple domains, giving you the opportunity to work on technologies that power next-generation cloud, AI, storage, and networking solutions. Some teams focus their design work on supporting architecture to GDSII (Graphic Data System) implementation of ASIC and processor designs. Other teams focus on timing analysis for future designs of our next-gen high-performance data center chips in a leading-edge CMOS process technology. Across all groups, you'll collaborate with your direct team and cross-functional partners, working through technical design challenges to ensure we meet the performance, power, and area requirements of an active design.

What You Can Expect

  • Perform synthesis, floor planning, place and route, clock insertion, timing analysis, and timing closure on complex logic blocks using industry standard EDA tools (PrimeTime, Tempus)
  • Write scripts in Python, TCL, Perl, and Shell to aid design and development activities
  • Utilize problem solving skills to analyze, debug, and implement fixes for design violations using CAD tools
  • Collaborate with RTL,Synthesis, andother Design teamsto resolve congestion & timingbottlenecks, and ensure that all designs converge & integratein a timely manner

What We're Looking For

  • Currently enrolled in aBachelor'sDegreeinElectrical Engineering, Computer Engineering,or a related field with an expected graduation datebetweenFall 2027 - Summer 2028
  • Completed courses focusing onVLSI,digital logic, circuit design, computer architecture,RTL synthesis,Verilog orSystemVerilog,place and route, static timing analysis,digital systems,ormicroelectronics
  • Proficiencyin programming & scripting languages likePython, TCL, Perl, and Shell
  • Experience working in a Unix type environment
  • Experienceusingtoolslike Synopsys(PrimeTime),Cadence(Tempus), andMentor
  • Strong analysis, problem solving, and communication skills

Expected Base Pay Range (USD)

29 - 57, $ per hour.

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights for our interns: medical, dental, and vision coverage, perks and discounts, robust mental health resources to prioritize emotional well-being, and paid holidays. Additional compensation may be available for intern PhD candidates. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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