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Intern High Performance Computing Engineer Jobs in Austin, TX

Intel

Senior Out-of-Order CPU Architect

Austin, TX

$165K/yr

... high-performance computing and low-power products. This role is integral to Intel's mission to ... Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions ...

NVIDIA

Senior HPC Storage Engineer

Austin, TX · On-site

As a Senior HPC Storage Engineer, you will lead the research, design, and implementation of innovative storage solutions for high performance computing workloads, while collaborating with teams to ...

Nvidia

Senior CPU Performance Architect

Austin, TX

$165K/yr

... high-performance computing (HPC), cloud service providers (CSP), gaming, virtual reality, and ... What we need to see: * BS/MS in Electrical Engineering, Computer Science, Computer Engineering, or ...

Apptronik

Senior SimOps Engineer

Austin, TX · On-site

$103K - $142K/yr

Deploy and manage High-Performance Computing (HPC) clusters (e.g., GCP, on-prem) to enable sub-24 ... Programming Proficiency: Advanced Python or C++ skills; experience with web frameworks for building ...

Intel

Senior CPU Power Management Architect

Austin, TX · On-site

$190K - $361K/yr

... high-performance computing and low-power products. This role is integral to Intel's mission to ... Minimum Qualifications * BS in electrical and computer engineering * 10+ years of experience ...

Optiver

Mechanical Design Engineer

Austin, TX

$75K - $102K/yr

We engineer simple, well-architected solutions that meet the dynamic needs of our traders. Our ... Design and develop mechanical systems for high-performance computing platforms and custom trading ...

Optiver

Mechanical Design Engineer

Austin, TX · On-site

$75K - $102K/yr

We engineer simple, well-architected solutions that meet the dynamic needs of our traders. Our ... Design and develop mechanical systems for high-performance computing platforms and custom trading ...

Nvidia

Senior AI Frameworks Engineer

Austin, TX

$121K - $160K/yr

NVIDIA's high-performance computing platforms are powering the AI revolution across many ... Optimize developer experience by creating debugging tools, profiler integrations, and validation ...

Tenstorrent

Staff Engineer, Physical Design

Austin, TX · On-site

$100K - $500K/yr

Direct impact on products that are redefining the landscape of AI and high-performance computing. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable ...

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As of Jul 13, 2026, the average hourly pay for intern high performance computing engineer in Austin, TX is $16.89, according to ZipRecruiter salary data. Most workers in this role earn between $14.28 and $19.04 per hour, depending on experience, location, and employer.
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Senior Out-of-Order CPU Architect

Senior Out-of-Order CPU Architect

Intel Corporation

Austin, TX • On-site

$165K/yr

Full-time

Medical, Retirement, PTO

Re-posted 26 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 146 frontline employees who took The Breakroom Quiz

11th of 142 rated electronics manufacturers

Job description

Job Details:
Job Description:
The Role and Impact
As a CPU Architect, you will be at the forefront of Intel's innovation, shaping the future of CPU designs for high-performance computing and low-power products. This role is integral to Intel's mission to deliver cutting-edge solutions that power the world's technology, from advanced data centers to everyday consumer devices. You will play a pivotal role in driving end-to-end CPU architecture specifications, ensuring optimal performance, power efficiency, scalability, and interoperability across hardware and software. Through creative problem-solving and collaboration, you will influence cross-functional roadmaps, define technology targets, and deliver revolutionary CPU architectures that meet diverse market requirements.
Key Responsibilities
  • Develop and drive end-to-end CPU architecture specifications based on hardware features, requirements, and lifecycle needs.
  • Define CPU targets for performance, power, frequency, area, and feature content to align with market requirements.
  • Explore new approaches and devise novel architectures that deliver optimized CPUs for multiple segments, from high-performance computing to extreme low-power applications.
  • Invent, conceptualize, and specify architectural and microarchitecture features that address future CPU usage and segment needs.
  • Define and document new instructions to support innovative use cases and improve existing ones, enhancing the instruction set architecture (ISA).
  • Develop and execute test plans and infrastructure for new architectures/features, simulate functional models, and analyze test results using advanced statistical techniques.
  • Propose experimental changes and design alternatives to meet constraints for performance, power, area, and timing.
  • Capable of, but not often required to in your role, of directly implementing your microarchitectural specifications in system verilog. If designers require aid in converging timing and/or power constraints, you are expected to be able to do the work yourself and solve the issues quickly.
  • Review and influence cross-functional roadmaps and collaborate with architects, design, verification, and validation engineers during project execution.
  • Drive definition of new microarchitectures and identify mitigations for issues during feature implementation to improve CPU designs.
  • Expertise in CPU architecture fundamentals, microarchitecture design, low-power design, RTL development, and System Verilog.
  • Proven ability to debug microarchitecture and simulation issues and solve complex design problems.

Qualifications:
Minimum Qualifications
  • 15+ consecutive years of experience within high performance/high frequency ARM or x86 CPU organizations working in either the design or architectural domain. Ideally both.
  • 10+ years of experience working within the out-of-order sections of the CPU pipeline. This includes the areas of wide instruction rename and allocation, uop/instruction schedulers, and execution units.
  • 5+ years writing RTL and owning it through timing and power convergence across multiple generations of a CPU line.
  • 2+ years of experience building deep, high frequency advanced integer and/or floating-point/vector schedulers.

Preferred Qualifications
  • Strong analytical and problem-solving skills demonstrated through leadership roles or team management.
  • Effective collaboration skills to work across teams and influence cross-functional roadmaps.
  • Passion for driving innovation and contributing to Intel's mission of delivering world-class technology solutions.

We invite you to join us in shaping the future of computing technology. Apply today to make your mark on the next-generation CPUs driving the world forward.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Texas, Austin
Additional Locations:
Business group:
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $190,610.00-361,480.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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