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Intern Hardware Verification Engineer Jobs in Colorado

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...

Design Verification Engineer

Broomfield, CO · On-site

$137K - $167K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...

Design Verification Engineer

Broomfield, CO · On-site

$137K - $167K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...

Lead Hardware Engineer

Boulder, CO · On-site

$128K - $169K/yr

Define, implement, and track hardware Verification and Validation (V+V) metrics Lead HW to ensure ... Deep engineering skillset spanning mechanical, electrical, optical, and test disciplines, with ...

Lead Hardware Engineer

Boulder, CO · On-site

$128K - $169K/yr

Define, implement, and track hardware Verification and Validation (V+V) metrics Lead HW to ensure ... Work directly with functional engineering leads to ensure your product line has sufficient, high ...

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Intern Hardware Verification Engineer information

What does an intern hardware verification engineer do?

An Intern Hardware Verification Engineer assists in testing and validating hardware components and systems to ensure they function correctly and meet design specifications. Their responsibilities often include writing test cases, running simulations, analyzing results, and working with senior engineers to identify and resolve issues. This role provides hands-on experience with hardware design tools, verification methodologies, and debugging processes. Interns gain valuable skills in both hardware engineering and quality assurance, which are essential for a career in hardware development.

What types of projects and responsibilities can I expect as an intern hardware verification engineer?

As an Intern Hardware Verification Engineer, you will typically assist in developing and executing test plans, writing and running simulation scripts, and debugging hardware designs alongside experienced engineers. You may work with design and verification teams to identify and resolve issues in digital circuits or systems, often using industry-standard verification languages and tools. Interns also gain hands-on experience with methodologies such as UVM or SystemVerilog, and may participate in regular team meetings and code reviews. This role is a great opportunity to build practical skills, collaborate with cross-functional teams, and learn about the end-to-end hardware development process.

What are the key skills and qualifications needed to thrive as an intern hardware verification engineer, and why are they important?

To thrive as an Intern Hardware Verification Engineer, you need a solid understanding of digital logic design, computer architecture, and at least a bachelor’s coursework in electrical or computer engineering. Familiarity with hardware description languages (such as Verilog or VHDL), simulation tools (like ModelSim or Questa), and version control systems is typically required. Attention to detail, strong problem-solving abilities, and effective teamwork are standout soft skills in this role. These skills ensure accurate verification of hardware designs, timely identification of issues, and successful collaboration within engineering teams.

What is the difference between Intern Hardware Verification Engineer vs Intern Digital Design Engineer?

AspectIntern Hardware Verification EngineerIntern Digital Design Engineer
Required SkillsHardware verification, scripting, basic digital logicDigital design, HDL coding, logic simulation
Work EnvironmentTesting and verifying hardware componentsDesigning and developing digital circuits
Industry UsageSemiconductor, electronics manufacturingSemiconductor, consumer electronics, embedded systems

Both roles are internship positions in hardware and digital design fields, often found in semiconductor and electronics companies. The Hardware Verification Engineer focuses on testing and validating hardware components, while the Digital Design Engineer emphasizes creating digital circuits. Interns in both roles typically require knowledge of digital logic and basic scripting, making them similar but distinct in their core responsibilities.

Design Verification Engineer

Fort Collins, CO


Broadcom
Semiconductor and Electronic Component Manufacturing • 10K+ employees

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

18th of 159 rated electronics manufacturers

Great coworkers

People enjoy working here

Good employer


$134K - $164K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 11 days ago


Job description

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Job Description:

Design Verification Engineer

Broadcom's ASIC Products Division (APD), a worldwide leader in the design of complex custom ASICs and embedded IP, is looking for an experienced verification engineer that will be responsible for modeling and verification activities related to complex digital and mixed signal (MXS) IP blocks used in Broadcom's ASIC developments.

The engineer will be responsible for defining verification plans and environment architecture, developing test cases and test bench components, coverage analysis and closure, and debug. This position may involve working with emulation and FPGA prototyping platforms and leading efforts in evaluating and driving the adoption of advanced verification methodologies/flows. The engineer will be expected to develop functional models to facilitate the block, system, and ASIC level verification. The candidate must work closely with the design teams and EDA vendors to accomplish the modeling and verification tasks.

The candidate must have experience using SystemVerilog and UVM, designing verification components including UVM agents, checkers, and behavioral models. Experience with implementing and achieving coverage goals by developing random & directed test cases, and SystemVerilog Assertions. This engineer will be responsible for analyzing and debugging simulation failures at the RTL and gate-level. The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing such formats in the verification context.

Requirements:

  • 12+ years of experience with verification concepts and architectures for complex digital and MXS circuits

  • Experience verifying designs at the block and system levels.

  • Experience with complex digital and mixed-signal circuits (PLL, DLL, ADC, DAC)

  • Experience debugging RTL and gate-level netlists, analyzing schematic diagrams of analog / MXS circuits

  • Experience using SystemVerilog and advanced verification concepts and methodologies (UVM, SVA)

  • Experience with Synopsys, Cadence, and Mentor simulations tools

  • Demonstrated ability to plan and deploy complex, reusable, and scalable verification environments

  • Experience with Perl/Python and Tcl or other scripting languages

  • Experience with version control systems (DesignSync, git)

  • Superior writing, grammar, and verbal communication skills

  • Excellent problem solver; develops and employs automated processes where applicable

  • Worked independently and in a global team and dynamic environment in a highly visible role

  • Possesses ability to learn and adapt to new tools and methodologies on the fly

  • Must have legal authorization to work in the US

It is a plus if the candidate has expertise in one or more of the following areas:

  • Experience with hardware design and debug

  • Experience with emulation (Palladium, Veloce, Zebu) and FPGA (Xilinx) platforms

  • Formal verification concepts / experience is a plus

  • Experience with verifying iJTAG network using ICL and PDL in the Tessent tool a plus

  • Experience with co-simulation a plus

Education and Experience required:

  • BS in Electrical Engineering / Computer Engineering and 12+ years of related experience; or an MS in Electrical Engineering / Computer Engineering and 10+ years of related experience.


Compensation and Benefits


The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.



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