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Intern Asic Design Verification Jobs in Portland, OR

ServerLogic

Senior ASIC Design Engineer

Beaverton, OR · On-site

Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a ... Use Verilog to design and System Verilog for block level verification * Assist the Verification ...

Hp

Senior ASIC Design Engineer

Vancouver, WA

$116K - $182K/yr

Senior ASIC Design Engineer Description - HP is the world's leading printing company. We are ... This includes RTL coding, verification, silicon validation, and qualification. * Proactively work ...

Apple

ASIC Design Engineer

Beaverton, OR · On-site

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... Verification, Emulation, STA, and Physical Design teams - Collaborate with software and systems ...

Apple

ASIC Design Engineer

Beaverton, OR

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... Verification, Emulation, STA, and Physical Design teams - Collaborate with software and systems ...

Sonsoft Inc

SoC Design and Verification

Hillsboro, OR · On-site

$148K - $180K/yr

At least 7 years of experience in RTL Design verification of SoCs (VHDL, Verilog, System Verilog ... Knowledge of ASIC design methodologies and flows. * Ability to Manage and conduct training for the ...

Apple Inc.

ASIC Design Engineer

Beaverton, OR · On-site

$150 - $210/hr

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... Work with other specialists that are members of the SOC Design, SOC Design- Verification, Emulation ...

Sonsoft Inc

SoC Design and Verification

Hillsboro, OR · On-site

$148K - $180K/yr

At least 7 years of experience in RTL Design verification of SoCs (VHDL, Verilog, System verilog ... Knowledge of ASIC design methodologies and flows * Ability to Manage and conduct training for the ...

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How much do intern asic design verification jobs pay per hour?

As of Aug 23, 2026, the average hourly pay for intern asic design verification in Portland, OR is $20.55, according to ZipRecruiter salary data. Most workers in this role earn between $15.29 and $22.93 per hour, depending on experience, location, and employer.

What cities near Portland, OR are hiring for Intern Asic Design Verification jobs?

Cities near Portland, OR with the most Intern Asic Design Verification job openings:

Intern Asic Design Verification jobs near you
Infographic showing various Intern Asic Design Verification job openings in Portland, OR as of June 2026, with employment types broken down into 11% Internship, and 89% Full Time. Highlights an 89% In-person, and 11% Remote job distribution, with an average salary of $42,743 per year, or $20.5 per hour.

Senior ASIC Design Engineer

ServerLogic

Beaverton, OR • On-site

Full-time

Re-posted 25 days ago

Job description

Sr/ ASIC Design Engineer
(5+ Years of Experience)
DESCRIPTION OF POSITION/DUTIES -
  1. Architect a block of an ASIC and write a microarchitecture specification (MAS) for the block
  2. Collaborate with other team members to integrate the block with the full chip
  3. Use Verilog to design and System Verilog for block level verification
  4. Assist the Verification team in reviewing and debugging test cases
  5. Run LINT and CDC checks on the RTL code and fix accordingly.
  6. Assist with synthesis and FPGA emulation.

QUALIFICATIONS -
  1. BA/MS degree and 5+ years of relevant work experience.
  2. Demonstrate knowledge of Verilog for chip design and verification.
  3. Must understand the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA prototyping, and first silicon bring up and debug.
  4. Understanding of digital design and verification practices.
  5. Be able to take a specification, write RTL and simulation vectors to verify their RTL.
  6. One prior RTL design is a requirement.
  7. Experience with USB 2.0, USB 3.2, USB4, or PCIe is desired.

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