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Intel Wafer Level Assembly Jobs (NOW HIRING)

Apple

Package Integration Engineer

San Francisco, CA · On-site

$122K - $164K/yr

In-depth knowledge in Wafer Level Chip Scale Packaging (RDL/Wafer Bumping & BEOL Assembly processes for Fan-In & Fan-Out designs). Expert level knowledge of common reliability failure modes. Able to ...

Element Solutions Inc

R&D Project Manager

Shelton, CT · On-site

Wafer Level Packaging - Revolutionizing wafer fabrication processes for enhanced efficiency and ... Electronics Assembly Solutions - Innovating semiconductor, surface mount technology, and power ...

Element Solutions

R&D Project Manager

Shelton, CT · On-site

Wafer Level Packaging - Revolutionizing wafer fabrication processes for enhanced efficiency and ... Electronics Assembly Solutions - Innovating semiconductor, surface mount technology, and power ...

Lightmatter

Director, NPI Operations

Mountain View, CA · On-site

Monitor and report on First Pass Yield (FPY) focusing on end-of-line electro-optical performance metrics, and drive continuous improvement initiatives for wafer-level yield and module assembly yield.

Lyte

Packaging and Assembly lead

Sunnyvale, CA · On-site

$100K - $200K/yr

Lead NPI process team involving wafer, device packaging, PCBA assembly process improvement and ... Knowledge of wafer level process including lithography, thin film, plating, and DIE/DRIE is a plus.

Intel

Foundry Customer Device Engineer

Phoenix, AZ

Intel is transforming from an Integrated Device Manufacturer (IDM) to a leading foundry service ... Wafer fab environment on Semiconductors, Device and Yield Analysis tools * Process impacts to ...

Apple

Process Engineer

San Francisco, CA · On-site

Expert-level knowledge in assembly steps: wafer thinning, wafer dicing, die attach (including flip chip and multi-die stacking), wirebond, encapsulation and underfill, SMT, transfer/compression ...

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Intel Wafer Level Assembly information

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$14

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$38

How much do intel wafer level assembly jobs pay per hour?

As of Jun 16, 2026, the average hourly pay for intel wafer level assembly in the United States is $24.62, according to ZipRecruiter salary data. Most workers in this role earn between $18.27 and $28.12 per hour, depending on experience, location, and employer.

What is the difference between Intel Wafer Level Assembly vs Intel Chip Packaging Technician?

AspectIntel Wafer Level AssemblyIntel Chip Packaging Technician
CredentialsTechnical certifications, associate degrees in electronics or related fieldsTechnical certifications, associate degrees in electronics or related fields
Work EnvironmentCleanroom environments focused on wafer processingManufacturing floors focused on packaging and assembly
Industry UsageInvolved in wafer-level processing before die separationHandles final packaging and testing of chips

Intel Wafer Level Assembly specialists focus on processing wafers at the micro-level, preparing them for die separation, while Intel Chip Packaging Technicians handle the final packaging, testing, and assembly of chips. Both roles require technical skills and work in cleanroom or manufacturing environments, but they differ in their specific stage of the semiconductor manufacturing process.

What is Intel Wafer Level Assembly?

Intel Wafer Level Assembly refers to the advanced manufacturing processes where semiconductor devices are assembled and packaged directly on the silicon wafer before it is diced into individual chips. This technique enables higher efficiency, better performance, and more compact designs compared to traditional assembly methods. Wafer level assembly is crucial for producing modern processors and memory devices, as it supports faster data transfer, improved thermal management, and cost-effective mass production. Intel utilizes sophisticated equipment and cleanroom environments to ensure the quality and reliability of chips produced through this method.

What are some common challenges faced by engineers in Intel Wafer Level Assembly, and how can they be addressed?

Engineers in Intel Wafer Level Assembly often encounter challenges such as maintaining high yield rates, troubleshooting equipment malfunctions, and adhering to strict process controls. The work environment is fast-paced and highly collaborative, requiring close coordination with quality assurance, process engineering, and equipment maintenance teams. Addressing these challenges typically involves strong analytical skills, proactive problem-solving, and continuous learning to stay updated with evolving manufacturing technologies. Regular cross-functional meetings and process improvement initiatives also help teams stay aligned and address issues efficiently.

What are the key skills and qualifications needed to thrive in Intel Wafer Level Assembly, and why are they important?

To excel in Intel Wafer Level Assembly, you need a solid understanding of semiconductor manufacturing processes, attention to detail, and typically a technical diploma or associate degree in electronics or a related field. Familiarity with cleanroom protocols, automated assembly tools, and quality control systems is essential, and certifications such as IPC or Six Sigma can be advantageous. Strong problem-solving skills, teamwork, and effective communication help individuals adapt to fast-paced, detail-oriented environments. These skills ensure high-quality production, minimize defects, and support efficient collaboration in semiconductor manufacturing.
Infographic showing various Intel Wafer Level Assembly job openings in the United States as of June 2026, with employment types broken down into 4% Locum Tenens, 10% Full Time, 85% Contract, and 1% Summer. Highlights an 95% Physical, 3% Hybrid, and 2% Remote job distribution, with an average salary of $51,210 per year, or $24.6 per hour.
SiC Wafer and Package Technology Development Engineer

SiC Wafer and Package Technology Development Engineer

onsemi

Scottsdale, AZ

Full-time

Posted 13 days ago

Onsemi rating

8.0

Company rating: 8.0 out of 10

Based on 18 frontline employees who took The Breakroom Quiz

Job description

Technical and customer support for the qualification of SiC die sales and development

SiC wafer die sales is a main focus for onsemi and is critical to its future.  This opportunity is for those who are technically focused and thrive on solving complex challenges and leading global teams to create future technology platforms and intellectual property for onsemi.

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world's most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here:

https://www.onsemi.com/careers/career-benefits

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.


onsemi is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, ethnicity, color, religion, ancestry, national origin, age, marital status, pregnancy, sex, sexual orientation, physical or mental disability, medical condition, genetic information, military or veteran status, gender identity, gender expression, or any other protected category under applicable federal, state, or local laws.

If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, you may contact Talent.acquisition@onsemi.com for assistance.
  • Strong communication skills
  • Ability to lead development projects and implement strategies on a global basis
  • Knowledge of post fab processing such as wafer thinning, sputter, electroplating, electroless plating, photolithography, wafer bonding. Knowledge of wafer level packaging, package assembly and component processes such as: wirebond, sintering, die attach, clip attach, reflow, molding
  • Knowledge of materials and material interactions 
  • Work with fellow technologists, customers, business unit representatives, sales, reliability, and other teams on a global basis to develop and qualify the next generation of SiC technologies which meets the cost, performance, manufacturing, timeline and reliability goals
  • Lead and organize efficient development methodologies to address issues and lead technology development through cross functional teams
  • Understand detailed customer requirements and verify latest technologies meet or exceed all expectations
  • Document findings and process flows to create baseline for new technology platforms
  • Lead maturity gate reviews, publish progress reports to executives and peers on monthly and quarterly basis.

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