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High Bandwidth Memory Jobs (NOW HIRING)

You have a proven track record of architecting high-performance solutions, particularly in the realm of High Bandwidth Memory (HBM) interface design. You are committed to continuous learning, keeping ...

This role owns micro-architecture, RTL execution, and silicon success for ultra-high bandwidth memory subsystems implemented on advanced nodes and integrated via 2.5D/3D packaging. You will operate ...

... memory bandwidth, and memory capacity. These factors have become critical to maintaining high utilization of compute resources and enabling efficient performance at scale. And, power ultimately ...

... memory bandwidth, and memory capacity. These factors have become critical to maintaining high utilization of compute resources and enabling efficient performance at scale. And, power ultimately ...

... of high-bandwidth and high-density memory packages.Strong knowledge of thin-die stacking ... technologies including wirebond, flip-chip, and wafer/die bonding.Strong knowledge of packaging ...

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High Bandwidth Memory information

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$2.4K

$5.3K

$7.7K

How much do high bandwidth memory jobs pay per month?

As of Jun 5, 2026, the average monthly pay for high bandwidth memory in the United States is $5,290.17, according to ZipRecruiter salary data. Most workers in this role earn between $3,000.00 and $7,500.00 per month, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a High Bandwidth Memory (HBM) Engineer, and why are they important?

To thrive as a High Bandwidth Memory (HBM) Engineer, you need a solid background in electrical engineering or computer engineering, with expertise in memory architectures and semiconductor design. Familiarity with tools such as Verilog/VHDL, circuit simulation software, and experience with DRAM or HBM standards are typically required, along with relevant certifications in hardware design. Strong problem-solving skills, attention to detail, and effective teamwork distinguish top performers in this field. These skills are essential to ensure the development of reliable, high-performance memory solutions critical for advanced computing systems.

What are some typical challenges faced by engineers working with High Bandwidth Memory (HBM) technologies?

Engineers working with High Bandwidth Memory often encounter challenges such as managing thermal constraints due to HBM’s high data throughput and stacked architecture. Integrating HBM with processors or FPGAs requires precise PCB design and signal integrity considerations to ensure reliable performance. Additionally, staying updated on evolving HBM standards and collaborating closely with cross-functional teams—such as hardware, firmware, and product design—is essential for successful implementation. These challenges make adaptability and strong communication skills valuable in this role.

What is High Bandwidth Memory (HBM)?

High Bandwidth Memory (HBM) is a type of high-speed computer memory used primarily in graphics cards, high-performance computing, and advanced AI processors. Unlike traditional memory, HBM stacks memory chips vertically and connects them with wide data buses, allowing for much higher data transfer rates and lower power consumption. This architecture enables faster performance and greater efficiency, making it ideal for demanding workloads. HBM is commonly used in GPUs, FPGAs, and data center applications where speed and bandwidth are critical.

What is the difference between High Bandwidth Memory vs GPU Architect?

AspectHigh Bandwidth MemoryGPU Architect
Primary FocusMemory technology design and optimizationGPU architecture and performance design
Required CredentialsElectrical engineering, computer engineeringComputer engineering, hardware design
Work EnvironmentMemory chip manufacturing, hardware R&DGPU design labs, hardware development
Industry UsageSemiconductor companies, memory manufacturers

High Bandwidth Memory specialists focus on developing and optimizing memory technologies, while GPU Architects design the overall architecture of graphics processing units. Both roles require strong technical credentials and often collaborate within hardware development teams, but they concentrate on different components of computing systems.

Infographic showing various High Bandwidth Memory job openings in the United States as of May 2026, with employment types broken down into 76% Full Time, 6% Part Time, 6% Temporary, and 12% Contract. Highlights an 88% In-person, and 12% Remote job distribution, with an average salary of $63,482 per year, or $30.5 per hour.
Analog Design, Architect - 15195

Analog Design, Architect - 15195

Synopsys

Boxborough, MA • On-site

$181K - $272K/yr

Full-time

Posted 27 days ago


Job description

General Information
Job Title
Engineering Architect (Analog Mixed-Signal Architect) - 15195
Job ID
15195
City
Boxborough
State/Province
Massachusetts
Date Posted
09-Feb-2026
Job Category
Engineering
Job Subcategory
Analog Design
Hire Type
Employee
Remote Eligible
No
Base Salary Range: $181000 - $272000
Descriptions & Requirements
Job Description and Requirements
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are an accomplished engineering leader with a passion for advancing the frontiers of analog mixed-signal technology. With a deep understanding of memory and die-to-die interfaces, you thrive in environments where innovation meets real-world impact. You have a proven track record of architecting high-performance solutions, particularly in the realm of High Bandwidth Memory (HBM) interface design. You are committed to continuous learning, keeping pace with evolving technologies and industry trends. Your communication skills enable you to articulate ideas clearly and work effectively across sites and disciplines. Above all, you are driven by the opportunity to contribute to critical components powering AI systems, knowing your work has a lasting impact on the future of technology.
What You'll Be Doing:
  • Reviewing and integrating the latest multichip and interposer technologies from various foundries into Synopsys' HBM PHY products.
  • Defining bump maps and top-level floorplans for HBM PHY products to ensure optimal performance, power, and area (PPA).
  • Collaborating with layout teams to deliver top metal covercells optimized for performance and reliability in HBM PHY designs.
  • Working with layout and SIPI teams to design interposer geometries that maximize performance and signal integrity.
  • Mentoring junior engineers and providing technical guidance across multi-site teams.

The Impact You Will Have:
  • Elevate the performance and reliability of Synopsys' HBM PHY products, directly contributing to the advancement of AI and high-performance computing systems.
  • Enable successful integration of cutting-edge multichip and interposer technologies, ensuring Synopsys remains at the forefront of semiconductor innovation.
  • Improve manufacturability and scalability of memory interface IPs, supporting the needs of leading semiconductor companies worldwide.
  • Drive technical excellence across cross-functional teams, fostering collaboration and knowledge sharing.
  • Enhance customer satisfaction by delivering robust, high-quality solutions that meet demanding market requirements.
  • Support Synopsys' reputation as a trusted IP provider through leadership, innovation, and problem-solving.

What You'll Need:
  • MS or PhD in Electrical Engineering or related field.
  • 15+ years of experience in memory or die-to-die interface design.
  • Expertise in floorplan optimization for IPs integrating full-custom analog and synthesized digital blocks.
  • Strong experience with power grid design and EMIR analysis.
  • Proficiency in interposer design and implementation.
  • Solid understanding of analog principles and designs (bandgaps, LDO regulators, current mirrors, DLL/PLLs).
  • Deep knowledge of signal-integrity and power integrity principles.
  • Experience with layout impact on circuit performance and reliability.
  • Ability to troubleshoot and debug memory interfaces effectively.
  • Excellent communication and collaboration skills across multi-site teams.

Who You Are:
  • A collaborative leader who inspires and guides teams to technical excellence.
  • Detail-oriented, analytical, and able to balance multiple priorities.
  • Innovative thinker, open to new approaches and emerging technologies.
  • Effective communicator, capable of translating complex technical concepts for diverse audiences.
  • Resilient and proactive in addressing challenges and driving solutions.
  • Committed to continuous learning and professional growth.

The Team You'll Be A Part Of:
You'll join our High Bandwidth Memory interface design team, a group of passionate engineers dedicated to developing best-in-class IP for the world's most advanced computing systems. Our team collaborates across multiple sites and disciplines, leveraging expertise in analog mixed-signal design, layout, and signal integrity to deliver innovative solutions that power the next generation of AI and high-performance devices.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.

Synopsys logo

About Synopsys

Sourced by ZipRecruiter

Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software partner for creative companies developing the electronic products and software applications we rely on every single day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer building advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver exceptional, secure products for the era of connected everything. The company is headquartered in Mountain View, California, and has approximately 113 offices located throughout North America, South America, Europe, Japan, Asia and India. Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every single day.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

Mountain View, CA, US

Year founded

1986

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