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Freelance Physical Design Engineer Jobs in Spring Grove, IL

Labor Solutions, LLC

Mechanical Engineer

Libertyville, IL · On-site

$100K - $100K/yr

The Mechanical Engineer is responsible for the design, development, testing, and continuous ... Physical Requirements: · Ability to sit, stand, and walk for extended periods. · Ability to ...

Allergan

Engineer, Technology I

Mettawa, IL · On-site

$133 - $162/hr

Review design & code to meet acceptance criteria. * Oversee code branching, & CI/CD pipeline ... physical or mental disability, medical condition, genetic information, gender identity or ...

AbbVie

Engineer, Technology I

Mettawa, IL · Hybrid

$132K - $162K/yr

Review design & code to meet acceptance criteria. * Oversee code branching, & CI/CD pipeline ... physical or mental disability, medical condition, genetic information, gender identity or ...

Asyst Technologies L P

Project Engineer

Kenosha, WI · On-site

We design, develop, and manufacture world-class plastic components and automated systems for ... plus Physical Requirements * Ability to work in both office and manufacturing environments

Scot Forge

Electrical Engineer

Spring Grove, IL

This position requires the ability to design machine panels for all Scot Forge machinery, including ... At Scot Forge, we help our customers with forged solutions from the world's physical infrastructure ...

SCOT FORGE

Electrical Engineer

Spring Grove, IL · On-site

$75K - $105K/yr

This position requires the ability to design machine panels for all Scot Forge machinery, including ... At Scot Forge, we help our customers with forged solutions from the world's physical infrastructure ...

Stryker Corporation

Senior Engineer - Sage, NPD

Cary, IL · On-site

$86 - $143/hr

This role will involve the design and development of new medical devices that support the mission ... Manufacturing roles and any role that requires physical presence at the office would qualify under ...

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Freelance Physical Design Engineer information

See Spring Grove, IL salary details

$14

$47

$132

How much do freelance physical design engineer jobs pay per hour?

As of Aug 22, 2026, the average hourly pay for freelance physical design engineer in Spring Grove, IL is $47.90, according to ZipRecruiter salary data. Most workers in this role earn between $24.38 and $62.02 per hour, depending on experience, location, and employer.

What is a freelance physical design engineer?

Freelance Physical Design Engineers are specialized professionals who work independently, often on a contract basis, to design and implement the physical layout of integrated circuits (ICs) and chips. They are responsible for taking a digital circuit design and transforming it into a manufacturable physical layout, which includes tasks such as floorplanning, placement, routing, timing analysis, and verification. These engineers typically use electronic design automation (EDA) tools and collaborate remotely with semiconductor companies, startups, or design teams. Freelance Physical Design Engineers offer flexibility and specialized expertise for projects without requiring long-term employment commitments.

What are the key skills and qualifications needed to thrive as a freelance physical design engineer?

To thrive as a Freelance Physical Design Engineer, you need expertise in ASIC/FPGA physical design, knowledge of VLSI concepts, and a degree in electrical or electronics engineering. Familiarity with EDA tools such as Cadence, Synopsys, or Mentor Graphics, and experience with scripting languages like TCL or Python are typically required. Strong problem-solving, communication, and time management skills help freelancers efficiently collaborate with clients and meet project deadlines. These skills and qualities are vital for delivering high-quality chip designs and succeeding in a competitive, project-based environment.

What are some common challenges faced by freelance physical design engineers, and how can they be addressed?

Freelance physical design engineers often encounter challenges such as limited access to advanced EDA tools, variable project scopes, and the need to quickly adapt to different clients' design methodologies. To address these, it’s important to invest in personal tool licenses or partner with clients who provide access, maintain a strong network to secure consistent projects, and stay updated on industry trends and technologies. Effective communication and documentation also help ensure alignment with client expectations and avoid misunderstandings during the project lifecycle.

What is the difference between Freelance Physical Design Engineer vs Full-Time Physical Design Engineer?

AspectFreelance Physical Design EngineerFull-Time Physical Design Engineer
CredentialsTypically requires a relevant degree and industry experience; certifications are optionalRequires a degree and often certifications or ongoing training
Work EnvironmentIndependent, project-based, remote or on-siteCompany office or dedicated team environment
Employer & Industry UsageHired by multiple clients across various companies; flexible engagementsEmployed by a single company; stable employment
Work ScopeSpecific projects, often short-termOngoing responsibilities within a team or department

The main difference between a Freelance Physical Design Engineer and a Full-Time Physical Design Engineer lies in employment type, work environment, and project scope. Freelancers work independently on short-term projects for multiple clients, offering flexibility. Full-time engineers are employed by a single company, focusing on continuous, long-term responsibilities within a team.

What are the most commonly searched types of Physical Design Engineer jobs in Spring Grove, IL?

The most popular types of Physical Design Engineer jobs in Spring Grove, IL are:

What cities near Spring Grove, IL are hiring for Freelance Physical Design Engineer jobs?

Cities near Spring Grove, IL with the most Freelance Physical Design Engineer job openings:

Freelance Physical Design Engineer jobs near you

Program Management - Principal TPM - Packaging, SI/PI & System Integration

Eliyan

Mundelein, IL • On-site

$131K - $170K/yr

Full-time

Posted 15 days ago

Job description

Join the leading chiplet startup! As an Eliyan Principal Technical Program Manager, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet-based systems with best-in-class power, area, manufacturability, and design flexibility. You will drive day-to-day execution across multiple concurrent advanced packaging, SI/PI, and system integration programs — from early feasibility through qualification and production ramp — in close coordination with our broader ASIC development and platform programs. You will work with a cross-functional team of experts who operate from first principles, innovate, and push the envelope to create high-volume, high-performance manufacturable products. We offer a fun work environment with excellent benefits.

 ON-SITE (BAY AREA)

About the Role:

This role sits at the intersection of packaging, signal/power integrity, and system design. As a Principal Technical Program Manager, you will own the schedule, risk, and cross-team strategy for our packaging and SI/PI program portfolio, translating between analog and digital design teams, package and substrate engineers, and external vendors to keep every program on track. You will set the standard for how packaging programs are planned and executed across the company and represent packaging and system integration to executive leadership. Strong candidates are comfortable coming up to speed quickly on unfamiliar technical territory, spot bottlenecks before they become critical-path problems, and know how to drive a room of engineers toward a resolution.

Key Responsibilities:
  • Packaging & SI/PI Program Execution: Own and drive program schedules for advanced packaging and SI/PI workstreams — including 2.5D/3D IC integration, chiplet interposer/substrate design, bump/RDL planning, and co-packaged optics (CPO) — from early feasibility through qualification and production ramp, ensuring milestones stay synchronized with die-level tapeout schedules.
  • Technical Fluency Across the Design Flow: Maintain a deep working understanding of SI/PI, package, and system design flows — including inputs, outputs, and inter-stage dependencies — with the ability to engage meaningfully with analog and digital design teams as well as external vendors and suppliers.
  • Multi-Program Portfolio Management: Manage multiple concurrent packaging and SI/PI projects simultaneously with clear, real-time visibility into the status of each. Assess and communicate the downstream impact of new or unplanned work on existing commitments, and confidently adjust priorities — or push back — when scope conflicts arise.
  • Rapid Ramp-Up & Structured Problem-Solving: Rapidly come up to speed on new projects and unfamiliar technical domains, quickly identify technical and schedule bottlenecks, and drive structured brainstorming sessions to unblock the team and keep programs on track.
  • Cross-Functional Coordination: Work closely with internal teams — including package/SI-PI engineering, physical design, DFT, analog design, PCB and platform design, silicon bring-up, and optical product development — to keep packaging milestones aligned with the broader ASIC and platform program.
  • OSAT & Foundry/Vendor Management: Manage relationships and schedules with outsourced assembly and test (OSAT) partners, substrate vendors, and foundries; track packaging-specific deliverables (interposer fab, flip-chip assembly, bump qualification, reliability testing) against committed timelines.
  • Customer & Partner Interface: Interface directly with customers and technology partners on packaging-related deliverables, co-design requirements, and integration milestones — particularly for CPO and advanced heterogeneous integration programs.
  • Schedule and Risk Management: Define program timelines, set milestones (DOE runs, qualification builds, reliability testing cycles), and proactively identify and mitigate risks specific to advanced packaging technologies (yield, assembly tolerances, thermal/mechanical qualification).
  • Budget & Resource Allocation: Own packaging program budgets, allocate resources across internal engineering and external OSAT/substrate partners, and track expenses to optimize development efforts.
  • Technical Reviews & Reporting: Lead regular program reviews, maintain clear documentation of program status and risk, and report progress to executive leadership and key stakeholders using dashboards and structured status updates.
  • Process Improvement: Define and continuously improve program management best practices specific to packaging, SI/PI, and advanced integration workflows, improving execution efficiency across teams and projects.
Qualifications:
  • Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related field.
  • 15+ years of experience in semiconductor program management, with substantial hands-on experience in advanced packaging (2.5D/3D integration, flip-chip, interposers, substrate/RDL, CoWoS/InFO/EMIB or equivalent) and/or SI/PI program execution.
  • Deep technical fluency across SI/PI, package, and system design flows, with credibility engaging analog and digital design teams and external vendors.
  • Develop ability to manage multiple concurrent projects with clear, real-time visibility into status and sound judgment on reprioritization when scope conflicts arise.
  • Track record of ramping quickly on new or unfamiliar technical domains and resolving bottlenecks through structured problem-solving.
  • Experience managing OSAT, substrate vendor, and foundry relationships through qualification and production.
  • Strong understanding of the packaging development lifecycle, including design rules, assembly processes, reliability qualification (thermal cycling, HTOL, THB), and DFM/DFR considerations.
  • Excellent problem-solving, leadership, and decision-making skills, particularly in navigating cross-functional tradeoffs between silicon design, packaging, and manufacturing constraints.
  • Strong verbal and written communication skills, comfortable interfacing with both technical and non-technical stakeholders, including customers and external partners.
  • Experience with project management tools (e.g., Jira, MS Project, Confluence, Smartsheet) and methodologies (Agile, Waterfall).
Nice to Have:
  • Experience with co-packaged optics (CPO) or advanced heterogeneous integration.
  • Knowledge of high-performance computing, AI/ML accelerator packaging, or networking ASIC packaging.
  • Familiarity with signal/power integrity simulation and analysis at the package or system level.
  • Experience standing up program dashboards, RAID logs, or portfolio-level reporting for multi-project environments.
Why Eliyan?
  • Work at the forefront of chiplet interconnect technology, defining the next generation of high-performance, power-efficient chip-to-chip communication.
  • High-visibility role with direct exposure to founders and executive leadership.
  • Competitive salary, meaningful equity, and comprehensive benefits.
  • A collaborative, first-principles culture where your ideas and ownership directly shape outcomes.

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.