Analog Design Engineer
$50 - $80/hr
... computing and power management technologies. If you have deep expertise in Analog IC Design, LDO architecture, FinFET technologies, and silicon validation, we'd love to speak with you.
New
$50 - $80/hr
... computing and power management technologies. If you have deep expertise in Analog IC Design, LDO architecture, FinFET technologies, and silicon validation, we'd love to speak with you.
New
$50 - $80/hr
... computing and power management technologies. If you have deep expertise in Analog IC Design, LDO architecture, FinFET technologies, and silicon validation, we'd love to speak with you.
New
Chandler, AZ · On-site
$198K/yr
In this role, you will contribute to the design of next generation ICs spanning data converters, power management, amplifiers, and common analog infrastructure implemented in advanced CMOS processes.
Chandler, AZ · On-site
$198K/yr
In this role, you will contribute to the design of next generation ICs spanning data converters, power management, amplifiers, and common analog infrastructure implemented in advanced CMOS processes.
Irvine, CA · On-site
$125K - $135K/yr
Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array ... Design and analyze power management circuits, including LDOs and charge pumps. Annual base salary ...
Irvine, CA · On-site
$125K - $135K/yr
Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array ... Design and analyze power management circuits, including LDOs and charge pumps. Annual base salary ...
Irvine, CA · On-site
$125K - $135K/yr
Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array ... management circuits, including LDOs and charge pumps. Annual base salary for this role in ...
Irvine, CA · On-site
$125K - $135K/yr
Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array ... management circuits, including LDOs and charge pumps. Annual base salary for this role in ...
Durham, NC · On-site
$279K - $419K/yr
Ampere is a semiconductor design company for a new era, leading the future of computing with an ... This leadership role will drive the development of advanced analog power management circuits and ...
Durham, NC · On-site
$279K - $419K/yr
Ampere is a semiconductor design company for a new era, leading the future of computing with an ... This leadership role will drive the development of advanced analog power management circuits and ...
Irvine, CA · On-site
$125K - $135K/yr
Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array ... management circuits, including LDOs and charge pumps. Annual base salary for this role in ...
Irvine, CA · On-site
$125K - $135K/yr
Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array ... management circuits, including LDOs and charge pumps. Annual base salary for this role in ...
Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array ... management circuits, including LDOs and charge pumps. Annual base salary for this role in ...
Quick apply
Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array ... management circuits, including LDOs and charge pumps. Annual base salary for this role in ...
Santa Clara, CA · On-site
$279K - $419K/yr
Ampere is a semiconductor design company for a new era, leading the future of computing with an ... This leadership role will drive the development of advanced analog power management circuits and ...
Santa Clara, CA · On-site
$279K - $419K/yr
Ampere is a semiconductor design company for a new era, leading the future of computing with an ... This leadership role will drive the development of advanced analog power management circuits and ...
$157K - $189K/yr
Conduct design reviews and manage tape out schedule * Provide guidance to layout engineers on critical analog implementation aspects, monitors progress of layouts, and closes the loop with post ...
$157K - $189K/yr
Conduct design reviews and manage tape out schedule * Provide guidance to layout engineers on critical analog implementation aspects, monitors progress of layouts, and closes the loop with post ...
Boxborough, MA · On-site
$121K/yr
Design and develop LDO regulators and analog power management circuits for high-performance SoCs and chiplets * Perform transistor-level circuit design, analysis, and optimization for stability, PSRR ...
Boxborough, MA · On-site
$121K/yr
Design and develop LDO regulators and analog power management circuits for high-performance SoCs and chiplets * Perform transistor-level circuit design, analysis, and optimization for stability, PSRR ...
San Jose, CA · On-site
$157K - $189K/yr
Conduct design reviews and manage tape out schedule * Provide guidance to layout engineers on critical analog implementation aspects, monitors progress of layouts, and closes the loop with post ...
San Jose, CA · On-site
$157K - $189K/yr
Conduct design reviews and manage tape out schedule * Provide guidance to layout engineers on critical analog implementation aspects, monitors progress of layouts, and closes the loop with post ...
Dallas, TX · On-site
$131/hr
About the Role Within the Automotive Electrification Business Unit, the Battery Management Systems ... As a Staff Analog/Mixed-Signal Design Engineer, you will lead the design and development of ...
Dallas, TX · On-site
$131/hr
About the Role Within the Automotive Electrification Business Unit, the Battery Management Systems ... As a Staff Analog/Mixed-Signal Design Engineer, you will lead the design and development of ...
Chandler, AZ · On-site
$198K/yr
In this role, you will contribute to the design of next generation ICs spanning data converters, power management, amplifiers, and common analog infrastructure implemented in advanced CMOS processes.
Chandler, AZ · On-site
$198K/yr
In this role, you will contribute to the design of next generation ICs spanning data converters, power management, amplifiers, and common analog infrastructure implemented in advanced CMOS processes.
Chandler, AZ · On-site
$198K/yr
In this role, you will contribute to the design of next generation ICs spanning data converters, power management, amplifiers, and common analog infrastructure implemented in advanced CMOS processes.
Chandler, AZ · On-site
$198K/yr
In this role, you will contribute to the design of next generation ICs spanning data converters, power management, amplifiers, and common analog infrastructure implemented in advanced CMOS processes.
Tempe, AZ · On-site
$193K/yr
Manager/Lead Analog/Mixed-Signal Design Engineer Location: Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a fast-growing innovator in high-performance ...
Tempe, AZ · On-site
$193K/yr
Manager/Lead Analog/Mixed-Signal Design Engineer Location: Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a fast-growing innovator in high-performance ...
San Diego, CA · Hybrid
$130K - $215K/yr
Job Summary: The Senior Analog Design Engineer is responsible for designing, simulating and ... power management, LDO regulators, bandgap, biasing circuits, amplifiers, oscillators, PLLs ...
San Diego, CA · Hybrid
$130K - $215K/yr
Job Summary: The Senior Analog Design Engineer is responsible for designing, simulating and ... power management, LDO regulators, bandgap, biasing circuits, amplifiers, oscillators, PLLs ...
As a senior analog design engineering manager, you will lead technical teams to deliver IP that will shape Intel's future of IO and chiplet interconnect technology.This engineering manager role will ...
As a senior analog design engineering manager, you will lead technical teams to deliver IP that will shape Intel's future of IO and chiplet interconnect technology.This engineering manager role will ...
San Diego, CA · On-site
$130K - $215K/yr
Job Summary: The Senior Analog Design Engineer is responsible for designing, simulating and ... power management, LDO regulators, bandgap, biasing circuits, amplifiers, oscillators, PLLs ...
San Diego, CA · On-site
$130K - $215K/yr
Job Summary: The Senior Analog Design Engineer is responsible for designing, simulating and ... power management, LDO regulators, bandgap, biasing circuits, amplifiers, oscillators, PLLs ...
As a senior analog design engineering manager, you will lead technical teams to deliver IP that will shape Intel's future of IO and chiplet interconnect technology. This engineering manager role will ...
As a senior analog design engineering manager, you will lead technical teams to deliver IP that will shape Intel's future of IO and chiplet interconnect technology. This engineering manager role will ...
Boxborough, MA · Hybrid
$195K/yr
Design and develop LDO regulators and analog power management circuits for high-performance SoCs and chiplets * Perform transistor-level circuit design, analysis, and optimization for stability, PSRR ...
Boxborough, MA · Hybrid
$195K/yr
Design and develop LDO regulators and analog power management circuits for high-performance SoCs and chiplets * Perform transistor-level circuit design, analysis, and optimization for stability, PSRR ...
$23.52 is the 25th percentile. Wages below this are outliers.
$14.90 - $25.57
31% of jobs
The median wage is $32.14 / hr.
$25.57 - $36.23
31% of jobs
$36.23 - $46.90
4% of jobs
$56.23 is the 75th percentile. Wages above this are outliers.
$46.90 - $57.56
10% of jobs
$57.56 - $68.23
9% of jobs
$68.23 - $78.89
5% of jobs
$78.89 - $89.55
0% of jobs
$89.55 - $100.22
8% of jobs
$100.22 - $110.88
0% of jobs
$110.88 - $121.55
0% of jobs
$121.55 - $132.21
1% of jobs
$14
$47
$132
Analog Designer 5 – Austin, TX
📍 Location: Austin, TX
📅 Contract Duration: 12 Months
💰 Pay Rate: $50 - $80/hr
🏢 Semiconductor Industry
Trilyon Services is actively hiring an experienced Analog Designer 5 for a leading semiconductor company developing next-generation high-performance computing and power management technologies.
If you have deep expertise in Analog IC Design, LDO architecture, FinFET technologies, and silicon validation, we'd love to speak with you.
Responsibilities:
✅ Design and validate high-performance LDO (Low Dropout Regulator) circuits
✅ Perform schematic design, simulation, silicon bring-up, testing, and debug
✅ Drive analog design activities from concept through silicon characterization
✅ Collaborate with layout, validation, and product engineering teams
✅ Apply advanced analog design methodologies to optimize performance, power, and reliability
✅ Analyze process impacts in advanced FinFET and GAA technologies
Required Qualifications
✔ 10+ years of Analog IC Design experience
✔ Strong expertise in LDO design and architecture
✔ Strong Analog Mixed-Signal circuit design experience
✔ Experience with FinFET and GAA process technologies
✔ Hands-on silicon validation and characterization experience
✔ Strong understanding of layout parasitics and layout effects
✔ Proficiency with Cadence and industry-standard analog design tools
✔ Experience supporting multiple tape-out cycles through production
✔ Master's Degree preferred
Why Apply?
🚀 Work on cutting-edge semiconductor products
🚀 Advanced node technologies
🚀 High-impact engineering role
🚀 Opportunity to work with industry-leading design teams
📩 Interested candidates can send their resume directly to:
kaushik@trilyonservices.com
Please include your contact number and best time to reach you.
Sourced by ZipRecruiter
It services
11 - 50 Employees
Cupertino, CA, US
2009