Required: * Experience with reverse engineering compiled programs (C/C++) * Experience reading ... Detailed understanding of embedded platforms (FPGA, physical memory) * Securely implemented ...
Required: * Experience with reverse engineering compiled programs (C/C++) * Experience reading ... Detailed understanding of embedded platforms (FPGA, physical memory) * Securely implemented ...
Microelectronics Vulnerability Researcher
Quantico, VA · On-site
$86K - $198K/yr
This is a highly technical, lab-focused engineering role centered on hardware analysis, reverse ... Experience with Field Programmable Gate Array (FPGA) development * Experience monitoring and ...
Microelectronics Vulnerability Researcher
Quantico, VA · On-site
$86K - $198K/yr
This is a highly technical, lab-focused engineering role centered on hardware analysis, reverse ... Experience with Field Programmable Gate Array (FPGA) development * Experience monitoring and ...
Fpga Reverse Engineer information
What is the difference between Fpga Reverse Engineer vs FPGA Design Engineer?
| Aspect | Fpga Reverse Engineer | FPGA Design Engineer |
|---|---|---|
| Required Skills | Hardware analysis, reverse engineering, FPGA protocols | FPGA development, HDL coding, digital design |
| Work Environment | Security, defense, embedded systems | Consumer electronics, telecommunications, aerospace |
| Certifications | Often none specific, but security clearances may be needed | FPGA/ASIC design certifications, e.g., Xilinx or Intel certifications |
While both roles involve working with FPGA technology, Fpga Reverse Engineers focus on analyzing and understanding existing FPGA designs, often for security or troubleshooting purposes. FPGA Design Engineers create new FPGA hardware solutions from scratch, emphasizing development and implementation. Both roles require strong FPGA knowledge but differ in their primary objectives and work environments.
What does an FPGA Reverse Engineer do?
What are the key skills and qualifications needed to thrive as an FPGA Reverse Engineer, and why are they important?
What are the common challenges faced by FPGA Reverse Engineers when analyzing proprietary bitstreams or undocumented hardware designs?
Job description
Mid-Level Vulnerability Researcher
Zetier is seeking Mid-Level Vulnerability Researchers to analyze and counter malicious software and develop operationally critical cyber capabilities. Candidates will demonstrate practical experience designing, developing, and deploying tools intersecting command and control, persistence, and networking.
Required:
- Experience with reverse engineering compiled programs (C/C++)
- Experience reading common assembly languages (x86, x86-64, ARM)
- Experience developing in scripting languages (Python)
- Experience with debuggers and decompilers (gdb, Binja, IDA Pro)
- Ability to obtain and maintain a U.S. security clearance
Desired:
- Experience developing/defeating mitigations (ASLR, DEP, N^X)
- Developed defeats of common anti-RE techniques (obfuscation)
- Detailed understanding of embedded platforms (FPGA, physical memory)
- Securely implemented cryptographic primitives (AES-GCM, SHA256, ECDSA)
- Experience with program analysis tools and techniques (control flow, program slicing, taint tracing)
- Effective use of automated analysis (fuzzers, emulation, sandbox)
- Deep knowledge of file systems and formats (ELF, PE, Mach-O)
- Effective communication with customers and teammates
- Experience developing proof-of-concept exploits
- Active U.S. security clearance
Zetier is proud to be an Equal Opportunity Employer. We celebrate diversity and do not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, non-disqualifying physical or mental disability, national origin, veteran status or any other basis protected by law. All employment is decided on the basis of merit, qualifications, and business need.
About Zetier
Sourced by ZipRecruiter
Industry
Network security
Company size
11 - 50 Employees
Headquarters location
Arlington, VA, US