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Contract Uvm Verification Jobs in Virginia (NOW HIRING)

Senior FPGA_AIE Engineer

Chantilly, VA · On-site

$100 - $140/hr

... contracts covering approximately 50 countries. Our technology will enable all 8 billion people on ... Experience with UVM or hardware in the loop testing methodologies. * Experience with RFICs and ...

Senior FPGA_AIE Engineer

Chantilly, VA · On-site

$110 - $150/hr

... contracts covering approximately 50 countries. Our technology will enable all 8 billion people on ... Experience with UVM or hardware in the loop testing methodologies. * Experience with RFICs and ...

Senior FPGA_AIE Engineer

Chantilly, VA · On-site

$100 - $130/hr

... contracts covering approximately 50 countries. Our technology will enable all 8 billion people on ... Experience with UVM or hardware in the loop testing methodologies. * Experience with RFICs and ...

Senior FPGA_AIE Engineer

Chantilly, VA · On-site

$107K - $146K/yr

... contracts covering approximately 50 countries. Our technology will enable all 8 billion people on ... Experience with UVM or hardware in the loop testing methodologies. * Experience with RFICs and ...

Contract Uvm Verification information

What is a contract UVM verification engineer?

Contract UVM Verification engineers are professionals who specialize in using the Universal Verification Methodology (UVM) to verify the functionality of digital hardware designs, typically on a contract or project basis rather than as full-time employees. They create, implement, and maintain testbenches, sequences, and verification environments to ensure that integrated circuits (ICs) or systems-on-chip (SoCs) meet their design specifications. Their work is crucial for identifying and debugging design flaws before hardware production, reducing costly errors and development cycles. Contract engineers are often hired for specific projects where specialized UVM expertise is needed, allowing organizations to scale their verification teams efficiently.

What are the key skills and qualifications needed to thrive as a contract UVM verification engineer, and why are they important?

To thrive as a Contract UVM Verification Engineer, expertise in digital design verification, SystemVerilog, and Universal Verification Methodology (UVM) is essential, often supported by a degree in electrical or computer engineering. Familiarity with simulation tools like Synopsys VCS, Cadence Incisive, and scripting languages such as Python or Perl is typically required. Strong analytical thinking, attention to detail, and effective communication skills help engineers collaborate and identify complex design issues. These abilities ensure the delivery of robust, error-free hardware designs within project timelines and specifications.

What are some common challenges faced by contract UVM verification engineers when joining new projects, and how can they be addressed?

Contract UVM Verification engineers often face challenges such as quickly ramping up on unfamiliar codebases, understanding project-specific verification methodologies, and integrating with established teams. To overcome these, it’s important to proactively communicate with team members, thoroughly review project documentation, and leverage reusable UVM components where possible. Establishing strong lines of communication and participating in regular sync meetings can help bridge knowledge gaps and ensure alignment with project goals.

What is the difference between Contract Uvm Verification vs Contract SystemVerilog Verification?

AspectContract Uvm VerificationContract SystemVerilog Verification
CredentialsUVM Certification, Verilog/SystemVerilog knowledgeVerilog/SystemVerilog expertise, verification certifications
Work EnvironmentASIC/FPGA verification teams, EDA toolsASIC/FPGA verification teams, EDA tools
Industry UsageCommon in UVM-based verification environmentsUsed broadly in SystemVerilog verification projects
Comparison FocusUVM methodology specificsSystemVerilog language features

Contract Uvm Verification primarily focuses on UVM methodology and testbench development, while Contract SystemVerilog Verification emphasizes proficiency in SystemVerilog language features for verification tasks. Both roles often overlap but differ in their core focus areas within the verification process.

What are the most commonly searched types of Uvm Verification jobs in Virginia?

The most popular types of Uvm Verification jobs in Virginia are:

What job categories do people searching Contract Uvm Verification jobs in Virginia look for?

The top searched job categories for Contract Uvm Verification jobs in Virginia are:

What cities in Virginia are hiring for Contract Uvm Verification jobs?

Cities in Virginia with the most Contract Uvm Verification job openings:

Senior FPGA_AIE Engineer

Lynk

Chantilly, VA • On-site

$100 - $140/hr

Other

Re-posted 21 days ago


Job description

About Lynk

Lynk is the inventor of satellite direct to standard phone technology aka sat2phone, and has the world’s only commercial license from the FCC to operate a commercial sat2phone system. Today, Lynk allows mobile network operators' subscribers to send and receive text messages to and from space via standard unmodified, mobile devices. Lynk’s service has been tested and proven on all seven continents, has regulatory approvals in more than 30 countries and is currently being deployed commercially based on more than 40 MNO commercial service contracts covering approximately 50 countries.

Our technology will enable all 8 billion people on the planet to stay connected with the existing standard phone in their pocket. Everywhere. No matter what.

By joining Lynk, you will have the opportunity to directly touch the lives of billions. Your mission will be to bring mobile broadband to billions, pull hundreds of millions out of poverty, and save countless lives.

Job Summary

Lynk is developing cellular-based space payloads and seeks engineers with expertise and experience designing and developing custom software‑defined radio (SDR) platforms. Aspects of the position require an understanding of FPGA hardware, firmware, digital signal processing, and algorithms for SDR‑based satellite communication.

As a Senior FPGA_AIE Engineer, you will support the development of custom radio platforms for the primary (cellular service link) and secondary (TT&C / feeder link) communication links. The platform will initially be tested in a lab environment, then on the payload prototype in a lab environment that simulates orbit operations, and finally in space. The Senior FPGA Engineer will also be responsible for designing and implementing methods for ensuring successful testing, verification, and validation.

Core Responsibilities
  • Design and test high‑speed FPGA systems for satellite communication systems.
  • Build with AMD Versal hard IP such as AIE, NoC, CIPS, MRMAC, and DDR controllers.
  • Model and implement DSP algorithms in RTL or AMD AIE/AIE‑ML processors.
  • Implement device driver software in C, C++, or other languages for a Linux environment.
  • Develop and maintain documentation and ICDs for in‑house IP blocks and other related components.
Minimum Requirements
  • A Bachelor’s degree (or higher) in Electrical Engineering, Computer Engineering, or related field.
  • At least five years of recent related experience
  • At least three years of recent experience working with Xilinx/Altera FPGAs.
  • Proficient in at least one of the following:
    • SystemVerilog programming
    • AMD Versal SoC programming
    • AIE‑ML or AIE programming, specifically intrinsic based development.
Preferred Qualifications
  • Experience with timing closure for high utilization FPGA builds.
  • Experience with FPGA SoCs and Bare Metal or Petalinux design flows.
  • Experience with UVM or hardware in the loop testing methodologies.
  • Experience with RFICs and multi chip synchronization.
  • Experience with high‑speed interfaces such as JESD204C and high speed Ethernet.
  • Knowledge of the physical layer of cellular standards (e.g., GSM, LTE, 5G) is a plus.
ITAR Requirements

To comply with U.S. Government export control regulations (ITAR), applicants must be one of the following: (i) a U.S. citizen or national, (ii) a lawful permanent resident (green card holder), (iii) a refugee under 8 U.S.C. § 1157, or (iv) an asylee under 8 U.S.C. § 1158. Individuals who do not meet these criteria must be eligible to obtain the necessary authorizations from the U.S. Department of State. For more information, please refer to the ITAR guidelines.

Learn about ITAR here.

Job Location

Chantilly, VA

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