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Formal Verification Engineer Jobs in Massachusetts

Velaura

Design Verification Engineer

Boston, MA · On-site

$75 - $275/hr

Build verification environments using SystemVerilog, UVM, C/C++, assertions, formal verification, emulation, and related methodologies. * Collaborate with architects and RTL engineers to define ...

Draper

UVM Digital Verification Engineer

Cambridge, MA · On-site

$75K - $156K/yr

... Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you ... Experience with formal analysis * Practice using Python, Perl, Bash or other scripting languages

Draper

UVM Digital Verification Engineer

Cambridge, MA · On-site

$75K - $156K/yr

... Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you ... Experience with formal analysis * Practice using Python, Perl, Bash or other scripting languages

Draper

UVM Digital Verification Engineer

Cambridge, MA · On-site

$75 - $156/hr

... Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you ... and use formal analysis tools. You will work in multi-disciplinary teams with opportunities to ...

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Formal Verification Engineer information

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$87.4K

$155.8K

$222.2K

How much do formal verification engineer jobs pay per year?

As of Aug 24, 2026, the average yearly pay for formal verification engineer in Massachusetts is $155,758.00, according to ZipRecruiter salary data. Most workers in this role earn between $148,500.00 and $148,500.00 per year, depending on experience, location, and employer.

What is a formal verification engineer?

A Formal Verification Engineer is responsible for ensuring the correctness of hardware or software designs using mathematical and logical techniques. They apply formal methods to verify that a system behaves as intended, identifying potential design flaws early in the development process. This involves writing formal properties, using model checking tools, and collaborating with design and validation teams. Their work helps improve reliability, reduce bugs, and enhance the efficiency of verification compared to traditional simulation-based methods.

What are the common daily responsibilities of a formal verification engineer?

As a Formal Verification Engineer, your typical day involves creating and analyzing formal properties, developing assertions, and using formal verification tools to mathematically prove correctness of hardware designs. You'll collaborate closely with design and simulation teams to review specifications, identify verification requirements, and debug issues found during the verification process. Regular documentation of findings, participation in code and design reviews, and ongoing learning about new verification methodologies are also important parts of the role. This dynamic environment requires both technical depth and proactive teamwork to ensure high-quality design outcomes.

What are the key skills and qualifications needed to thrive as a formal verification engineer?

To thrive as a Formal Verification Engineer, you need a strong background in digital design, computer architecture, and logic, typically supported by a degree in electrical engineering, computer science, or a related field. Expertise in formal verification tools such as Cadence JasperGold, Synopsys VC Formal, or Mentor Questa, along with proficiency in hardware description languages (HDLs) like Verilog or VHDL, is essential. Strong analytical thinking, attention to detail, and effective communication skills help you collaborate with design and verification teams and present complex findings. These competencies are critical for ensuring hardware systems are bug-free, reliable, and meet stringent industry standards.

What are the most commonly searched types of Formal Verification Engineer jobs in Massachusetts?

The most popular types of Formal Verification Engineer jobs in Massachusetts are:

What are popular job titles related to Formal Verification Engineer jobs in Massachusetts?

For Formal Verification Engineer jobs in Massachusetts, the most frequently searched job titles are:

What job categories do people searching Formal Verification Engineer jobs in Massachusetts look for?

The top searched job categories for Formal Verification Engineer jobs in Massachusetts are:

Formal Verification Engineer jobs near you
Infographic showing various Formal Verification Engineer job openings in Massachusetts as of August 2026, with employment types broken down into 60% Full Time, and 40% Contract. Highlights an 100% In-person job distribution, with an average salary of $155,758 per year, or $74.9 per hour.

ASIC Design and Verification Engineer - AI

Analog Devices

Wilmington, MA • On-site

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 13 days ago

Analog Devices rating

8.7

Company rating: 8.7 out of 10

Based on 18 frontline employees who took The Breakroom Quiz

19th of 159 rated electronics manufacturers

Job description

About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).
ASIC Design and Verification Engineer - AI
The semiconductor industry is rapidly adopting AI for acceleration
Autonomous multi-agent systems that reason, learn, plan, and execute complex EDA tasks. By automating repetitive, multi-step design tasks and optimizing intricate workflows, agentic AI is the future and will enable engineers to focus on higher-level problems.
For this purpose
ADI is seeking a ASIC Design and Verification Engineer - AI isto spearhead the development and integration of best-in-class AI-driven tools in IC design and verification.
This position is in the Engineering Enablement (EE) group that provides industry-leading tools, methodologies, and support to accelerate product development across the company. You'll be a part of the Systems Verification and Validation (SVV) team within the EE organization in ADI's Vertical Business Units. SVV is responsible for developing, adopting, and supporting tools, methodologies, and solutions across the entire design verification landscape - including Unified Metric-Driven Verification (MDV), System Verilog (SV)/UVM-based methodologies, Mixed-Signal DV, Post-Silicon Validation Shift-Left, Formal Verification, Functional Safety, Security, Portable Stimulus, and Emulation/Prototyping technologies.
A major focus of the group recently has been around deploying and integrating advanced Agentic AI methods to boost productivity in areas of digital architecture, digital design, digital implementation DV and embedded software. This role offers an exciting opportunity to contribute to rapid advancements in a dynamic and fast-evolving field filled with engaging challenges.
About the Role
In this role, you will leverage your knowledge in Integrated Circuit (IC) design and verification with working knowledge of AI/ML to develop, integrate, deploy, and support best-in-class Agentic AI solutions including custom instructions, skills and automation scripts. You will help connect these tools with multiple engineering domains including system architecture, design, verification, and software teams to enhance productivity and quality. This is not an Agentic AI role, though you will use/create agents to accelerate output.
Key Responsibilities
  • Evaluate and integrate Agentic AI tools with industry standard and proprietary tools and workflows for massively accelerating various parts of the IC design and verification lifecycle
  • Develop libraries of custom instructions, skills, and automation scripts for Agentic AI tools
  • Apply machine learning and agentic AI techniques to extend and enhance ADI's EDA tools
  • Connect APIs and SDKs to ADI's design databases
  • Educate users on best practices for using Agentic AI tools, create documentation and deliver training workshops
  • Work closely with digital and analog design engineers, verification experts, and tool developers to identify pain points and integrate AI solutions
  • Evaluate and benchmark emerging AI/ML tools for semiconductor workflows
  • Develop and maintain automation tools to improve verification productivity and debug efficiency
  • Keep abreast of the latest in generative AI and agentic frameworks

Required Qualifications
  • 5 years of experience in the IC design and verification domain
  • Experience with LLM-related techniques: prompt engineering, RAG, vector databases
  • Strong experience with scripting languages (Python, Bash)
  • Strong experience with System Verilog/UVM and C-based test bench development
  • Proficiency with git version control and CI/CD pipelines (GitHub Actions, Jenkins)
  • Strong command-line Linux skills and experience with common Linux utilities
  • Excellent debugging and analytical skills
  • Strong coding and documentation practices
  • Excellent communication skills to work across teams

Preferred Qualifications
  • Knowledge of AI Infrastructure development, including MCP integration
  • API integration experience (REST/GraphQL)
  • Familiarity with cloud platforms (AWS, Azure) and CI/CD practices for ML tools
  • Experience fine-tuning or training LLMs for domain-specific applications
  • Experience with synthesizable RTL development
  • Experience with debugging of RTL and gate simulations
  • Experience with Xcelium and Synopsys tools
  • Proficiency in Formal Verification techniques and tools
  • Experience with coverage-driven verification methodologies
  • Familiarity with low power verification (UPF)

Preferred Education
  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or equivalent experience

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
The expected wage range for a new hire into this position is $116,960 to $160,820.
  • Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.
  • This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
  • This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.

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About Analog Devices

Sourced by ZipRecruiter

Analog Devices (NASDAQ: ADI) designs and manufactures semiconductor products and solutions. We enable our customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.

Industry

Electrical equipment, appliance, and component manufacturing

Company size

5,001 - 10,000 Employees

Headquarters location

Norwood, MA, US

Year founded

1965

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