Santa Clara, CA · On-site
$105K - $135K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $135K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
$105K - $135K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
$105K - $135K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
$105K - $135K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
$105K - $135K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Quick apply
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Quick apply
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Quick apply
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
Santa Clara, CA · On-site
$105K - $140K/yr
... speed I/O, SerDes, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal ... Need to work closely with system and test engineers to develop high speed interface, package/board ...
As a Senior Logic Design Engineer, you will be responsible for: * Developing micro-architecture ... FIFO, FSM, etc * Experience in designing mixed-signal digital logic * Basic understanding of ...
Quick apply
As a Senior Logic Design Engineer, you will be responsible for: * Developing micro-architecture ... FIFO, FSM, etc * Experience in designing mixed-signal digital logic * Basic understanding of ...
ASIC/SOC Verification Engineer Location: San Jose, CA Duration: Long term Required Skills: * B.S ... Working experience in IP/SoC verification using AMBA AXI, DMA, FIFO, etc modules * Knowledge of ...
ASIC/SOC Verification Engineer Location: San Jose, CA Duration: Long term Required Skills: * B.S ... Working experience in IP/SoC verification using AMBA AXI, DMA, FIFO, etc modules * Knowledge of ...
ASIC/SOC Verification Engineer Location: San Jose, CA Duration: Long term Required Skills: * B.S ... Working experience in IP/SoC verification using AMBA AXI, DMA, FIFO, etc modules * Knowledge of ...
ASIC/SOC Verification Engineer Location: San Jose, CA Duration: Long term Required Skills: * B.S ... Working experience in IP/SoC verification using AMBA AXI, DMA, FIFO, etc modules * Knowledge of ...
Mountain View, CA · On-site
$170 - $230/hr
Event‑driven message pipeline -- SQS FIFO queues for ordered delivery, Kafka consumers for event ... Concurrent/async programming: Python asyncio, Go goroutines, structured concurrency, cancellation ...
New
Mountain View, CA · On-site
$170 - $230/hr
Event‑driven message pipeline -- SQS FIFO queues for ordered delivery, Kafka consumers for event ... Concurrent/async programming: Python asyncio, Go goroutines, structured concurrency, cancellation ...
New
... FIFO queues for ordered delivery, Kafka consumers for event processing, and real-time streaming via gRPC and Socket.IO • Structured concurrency -- Python asyncio TaskGroups running multiple ...
... FIFO queues for ordered delivery, Kafka consumers for event processing, and real-time streaming via gRPC and Socket.IO • Structured concurrency -- Python asyncio TaskGroups running multiple ...
... FIFO queues for ordered delivery, Kafka consumers for event processing, and real-time streaming via gRPC and Socket.IO • Structured concurrency -- Python asyncio TaskGroups running multiple ...
... FIFO queues for ordered delivery, Kafka consumers for event processing, and real-time streaming via gRPC and Socket.IO • Structured concurrency -- Python asyncio TaskGroups running multiple ...
Santa Clara, CA · On-site
$156K - $160K/yr
Analog Mixed-Signal Design Engineer Job Duties ... Design, develop, and characterize embedded analog circuits, such as high speed I/O, SerDes, FIFO ...
Santa Clara, CA · On-site
$156K - $160K/yr
Analog Mixed-Signal Design Engineer Job Duties ... Design, develop, and characterize embedded analog circuits, such as high speed I/O, SerDes, FIFO ...
Santa Clara, CA · On-site
$156K - $160K/yr
Analog Mixed-Signal Design Engineer Job Duties ... Design, develop, and characterize embedded analog circuits, such as high speed I/O, SerDes, FIFO ...
Santa Clara, CA · On-site
$156K - $160K/yr
Analog Mixed-Signal Design Engineer Job Duties ... Design, develop, and characterize embedded analog circuits, such as high speed I/O, SerDes, FIFO ...
A FIFO (Fly-In Fly-Out) Engineer is a professional who works on a rotational basis, typically in remote locations such as mining sites, oil and gas projects, or infrastructure developments. They travel to the worksite for a set period (e.g., two weeks on, one week off) and then return home during their off time. FIFO Engineers are responsible for designing, maintaining, and optimizing engineering projects while adhering to strict safety and operational standards. This role often involves long hours, challenging environments, and collaboration with multidisciplinary teams. The FIFO schedule provides a structured work-life balance but requires adaptability and resilience.
To thrive as a FIFO (Fly-In Fly-Out) Engineer, you require a relevant engineering degree, strong technical expertise in your discipline (such as mining, mechanical, or civil), and proven problem-solving abilities. Familiarity with industry standard software (e.g., AutoCAD, SAP) and certifications like safety inductions or site-specific tickets are typically expected. Exceptional communication, adaptability to remote work environments, and resilience in high-pressure situations are key soft skills for this role. These competencies ensure you can deliver quality engineering solutions while maintaining safety and efficiency on rotational work schedules in remote project locations.
As a FIFO Engineer, you will work in a rotational roster, commonly spending several weeks on-site followed by a set period off-site, which can affect your work-life balance and personal routines. You will typically live in provided accommodations and may work longer shifts in remote locations, fostering close teamwork and reliance on your colleagues. While being away from home can be challenging, the role often comes with above-average compensation and unique opportunities to work on major projects. It's important to be prepared for the physical and mental demands, but many find the camaraderie and career advancement prospects rewarding.
$105K - $135K/yr
Full-time
Re-posted 29 days ago
Sourced by ZipRecruiter
Software development
1,001 - 5,000 Employees
Santa Clara, CA, US
1995
