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Entry Level Physical Design Engineer Jobs in Texas

You will collaborate with a variety of fields including Architecture, RTL, Synthesis, Clocking, DFT, Physical design and Post silicon engineering to ensure the best design practices are followed for ...

You will collaborate with a variety of fields including Architecture, RTL, Synthesis, Clocking, DFT, Physical design and Post silicon engineering to ensure the best design practices are followed for ...

You will collaborate with a variety of fields including Architecture, RTL, Synthesis, Clocking, DFT, Physical design and Post silicon engineering to ensure the best design practices are followed for ...

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...

GPU Physical Design Engineer, STA/Timing

Austin, TX · On-site

$134K - $138K/yr

You will collaborate with a variety of fields including Architecture, RTL, Synthesis, Clocking, DFT, Physical design and Post silicon engineering to ensure the best design practices are followed for ...

GPU Physical Design Engineer, STA/Timing

Austin, TX · On-site

$134K - $138K/yr

You will collaborate with a variety of fields including Architecture, RTL, Synthesis, Clocking, DFT, Physical design and Post silicon engineering to ensure the best design practices are followed for ...

Engineering Group, Engineering Group > ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the Physical Design Flow of high ...

New

You will collaborate with a variety of fields including Architecture, RTL, Synthesis, Clocking, DFT, Physical design and Post silicon engineering to ensure the best design practices are followed for ...

Physical Design Engineer- senior

Austin, TX · On-site

$99K - $135K/yr

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...

Engineering Group, Engineering Group > ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the Physical Design Flow of high ...

Performs various physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield) at the chip and block levels. Provides schedules and support cross-functional engineering ...

Physical Design Methodology CAD Engineer

Austin, TX · On-site

$134K - $138K/yr

We are looking for passionate engineers to join our team. In this role, you will be impacting a ... Description - Participating and engaging with cross functional teams to tackle key physical design ...

SoC Physical Design Engineer, PnR

Austin, TX

$134K - $138K/yr

Description In Physical Design, you will be at the center of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering best in class ...

SoC Physical Design Engineer, PnR

Austin, TX · On-site

$134K - $138K/yr

Description In Physical Design, you will be at the center of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering best in class ...

Physical Design Methodology CAD Engineer

Austin, TX · On-site

$134K - $138K/yr

We are looking for passionate engineers to join our team. In this role, you will be impacting a ... Description - Participating and engaging with cross functional teams to tackle key physical design ...

Description In Physical Design, you will be at the center of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering best in class ...

Showing results 21-40

Entry Level Physical Design Engineer information

What does an entry level physical design engineer do?

An Entry Level Physical Design Engineer works on the layout and implementation of integrated circuits (ICs), specifically focusing on translating logical circuit designs into physical layouts that can be manufactured. Their responsibilities often include tasks such as floorplanning, placement, routing, timing analysis, and design rule checking using specialized software tools. They collaborate with other engineers to ensure that the chip meets performance, power, and area requirements. Entry-level engineers are typically involved in supporting more experienced team members while learning industry-standard design flows and tools. This role plays a crucial part in bringing new electronic products to market.

What are some common challenges entry level physical design engineers face when transitioning from academic projects to industry roles?

Entry Level Physical Design Engineers often find that real-world projects are larger in scale and complexity compared to academic assignments. Adapting to industry-standard tools like Cadence or Synopsys, managing strict deadlines, and collaborating within multidisciplinary teams can be challenging at first. Additionally, understanding and following established workflows, as well as dealing with the nuances of process technology and design constraints, require a steep learning curve. However, many companies provide mentorship and training to help new engineers integrate smoothly and develop their expertise.

What are the key skills and qualifications needed to thrive as an entry level physical design engineer, and why are they important?

To thrive as an Entry Level Physical Design Engineer, you need a solid background in electrical engineering, digital logic design, and VLSI concepts, typically supported by a relevant bachelor’s or master’s degree. Familiarity with industry-standard tools like Cadence, Synopsys, or Mentor Graphics for layout, synthesis, and verification, as well as scripting languages such as TCL or Python, is essential. Strong problem-solving, teamwork, and attention to detail are standout soft skills for this role. These skills ensure the efficient translation of circuit designs into manufacturable layouts, driving successful chip development and collaboration in complex engineering environments.

What is the difference between Entry Level Physical Design Engineer vs Digital IC Design Engineer?

AspectEntry Level Physical Design EngineerDigital IC Design Engineer
CredentialsBachelor's in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesign teams, CAD tools, chip fabrication facilitiesDesign teams, simulation tools, hardware labs
Industry UsageFoundries, semiconductor companies, EDA firmsSemiconductor companies, integrated circuit design firms
Common Search IntentEntry level, physical implementation, chip layoutDigital logic, circuit design, RTL coding

Entry Level Physical Design Engineers focus on translating digital circuit designs into physical layouts, ensuring manufacturability and performance. Digital IC Design Engineers primarily work on designing digital circuits at the RTL level. While both roles require a background in electrical engineering and involve working with semiconductor companies, physical design emphasizes layout and fabrication, whereas digital design emphasizes circuit functionality and logic.

What are the most commonly searched types of Physical Design Engineer jobs in Texas?

The most popular types of Physical Design Engineer jobs in Texas are:

What are popular job titles related to Entry Level Physical Design Engineer jobs in Texas?

For Entry Level Physical Design Engineer jobs in Texas, the most frequently searched job titles are:

What job categories do people searching Entry Level Physical Design Engineer jobs in Texas look for?

The top searched job categories for Entry Level Physical Design Engineer jobs in Texas are:

What cities in Texas are hiring for Entry Level Physical Design Engineer jobs?

Cities in Texas with the most Entry Level Physical Design Engineer job openings:

Infographic showing various Entry Level Physical Design Engineer job openings in Texas as of August 2026, with employment types broken down into 87% Full Time, and 13% Part Time. Highlights an 94% In-person, and 6% Hybrid job distribution.

GPU Physical Design Engineer, STA/Timing

Apple

Austin, TX

$134K - $138K/yr

Full-time

Re-posted 20 days ago


Apple rating

8.0

Company rating: 8.0 out of 10

Based on 677 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers


Job description

Do you love creating elegant solutions to sophisticated challenges? As part of our Silicon Engineering group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processors! You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. In this job, you will be responsible for timing closure of highly complex GPU designs that go in every Apple product and will have amazing opportunities to set new standards for the next generation GPU designs. You will gain exposure to different aspects of product development, from concept to post silicon validation! You will collaborate with a variety of fields including Architecture, RTL, Synthesis, Clocking, DFT, Physical design and Post silicon engineering to ensure the best design practices are followed for a smooth timing convergence.
Description
In this role you will:
- Interact with RTL, architecture teams to understand physical design constraints related to timing and be the central point of contact to provide these to backend design flows.
- Work with Synthesis and Physical Design teams to implement the best design optimized for power, performance and timing.
- Setting up all DFT modes and making sure all test features are properly timed.
- Assemble the top level design for STA ensuring accurate analysis by reviewing all the logs and reports.
- Create and maintain scripts and automation to ensure high quality STA reports and work with other teams for timing closure.
- Run ECO flows on the design and responsible for close timing.
- Drive and support tapeout activities by running a full suite of signoff checks to ensure a high quality silicon for manufacture.
- Work with CAD and Vendors to constantly improve the flow and bring in groundbreaking features to the analysis flows.
Preferred Qualifications
Masters degree preferred.
Experience working with EDA tools and exposure to their APIs.
Familiar with STA concepts and good understanding of cross-talk, OCV, noise, etc.
Experience in analysis of large volume data, identifying and driving timing fixes, generate ECOs etc.
Willingness to work with multiple teams like synthesis, physical design, DFT, CAD and drive timing fixes and influence timing closure.
Good understanding in one or more multi-functional areas like DFT, synthesis, PD, clocking and the interaction of these domains to STA.
Able to identify critical items for timing closure and drive solutions.
Minimum Qualifications
Bachelors degree in Computer Science or Computer Engineering + 3 years relevant experience.
Experience in STA and timing closure or physical design.
Experience with scripting languages such as TCL, Python, Perl, shell scripting etc.

What Apple employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom


Apple logo

About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976