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Entry Level Asic Design Engineer Jobs in Ohio (NOW HIRING)

Wright Technical Services

VHDL Design Engineer

Cincinnati, OH · On-site

$118K - $163K/yr

All candidates must be eligible to obtain a United States Security Clearance The FPGA/ASIC Firmware Engineer is expected to design, architect, and implement waveforms and digital signal processing ...

LJB, Inc.

Civil Design Engineer

Miamisburg, OH · On-site

$70K - $80K/yr

Plan and design a wide range of land development projects. * Perform engineering calculations or ... Civil Engineer, Civil Engineering, Entry-level, Land Development

FirstEnergy

External Design Engineer

Akron, OH · On-site

The job of Substation Design Oversight Engineer requires an individual to be self-directed with an interest and / or ability to manage engineering designs, equipment and standards for the External ...

FirstEnergy Corp.

External Design Engineer

Akron, OH · On-site

The job of Substation Design Oversight Engineer requires an individual to be self-directed with an interest and / or ability to manage engineering designs, equipment and standards for the External ...

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Entry Level Asic Design Engineer information

See Ohio salary details

$89.4K

$142.8K

$192K

How much do entry level asic design engineer jobs pay per year?

As of Jun 14, 2026, the average yearly pay for entry level asic design engineer in Ohio is $142,790.00, according to ZipRecruiter salary data. Most workers in this role earn between $125,000.00 and $171,100.00 per year, depending on experience, location, and employer.

What is an Entry Level ASIC Design Engineer job?

An Entry Level ASIC Design Engineer is responsible for assisting in the design, development, and testing of Application-Specific Integrated Circuits (ASICs). They work with senior engineers to define specifications, write hardware descriptions using languages like Verilog or VHDL, and perform simulations to validate designs. They may also collaborate with verification teams, support synthesis and timing analysis, and help troubleshoot design issues. This role requires a strong foundation in digital logic design, semiconductor fundamentals, and hardware design methodologies.

What are the typical daily responsibilities for an Entry Level ASIC Design Engineer?

As an Entry Level ASIC Design Engineer, your daily tasks often include writing and debugging code in hardware description languages, running simulations to verify functionality, and collaborating with senior engineers to implement and optimize chip designs. You may also assist with testbench development, participate in design reviews, and document your progress for project tracking. Expect to work closely with a multidisciplinary team—including verification, layout, and software engineers—to ensure the final product meets performance and reliability standards. This collaborative, fast-paced environment provides valuable hands-on experience and growth opportunities for engineers early in their careers.

What are the key skills and qualifications needed to thrive in the Entry Level Asic Design Engineer position, and why are they important?

To thrive as an Entry Level ASIC Design Engineer, you need a solid understanding of digital logic design, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools like Synopsys or Cadence and experience with simulation and verification environments are commonly expected. Strong problem-solving skills, effective communication, and the ability to work collaboratively make candidates stand out. These competencies enable precise design, successful project collaboration, and adaptation to the fast-paced, detail-oriented nature of ASIC development.

What are the most commonly searched types of Asic Design Engineer jobs in Ohio? The most popular types of Asic Design Engineer jobs in Ohio are:
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Entry Level Asic Design Engineer jobs near you

VHDL Design Engineer

Wright Technical Services

Cincinnati, OH • On-site

$118K - $163K/yr

Other

Posted 19 days ago

Job description

FPGA Design Engineer

Note our client is based in Cincinnati, Ohio. Our client is willing to relocate the right individual but would need this person onsite.

All candidates must be eligible to obtain a United States Security Clearance

The FPGA/ASIC Firmware Engineer is expected to design, architect, and implement waveforms and digital signal processing (DSP) algorithms using VHDL or Verilog targeting software defined radio (SDR) hardware. Firmware development is applied to high complexity and high throughput implementations with a focus on VHDL, code re-use, fixed-point modeling, low power design, system integration, test automation, FPGA/ASIC IP Core development and product test/support while leveraging advancements in systems-on-chip (SoCs), synthesis tools and SDR hardware. We are looking for individuals who have demonstrated abilities in innovative thinking and versatility in their jobs with experience in the following: FPGA/ASIC architecture design, simulation and verification, MATLAB or C/C++ familiarity and proposal, report and system/product specification development. The individual will work within a team environment to achieve high efficiency in solving our customer’s formidable challenges and meeting our customer’s requirements objectives.

Roles and Responsibilities

  • Demonstrated leadership skills/experience in digital design engineering, HDL coding, implementation of waveforms/modems and digital signal processing, performance/test analysis and technical team leadership.
  • Implementation of waveforms/algorithms in VHDL (preferred) or Verilog.
  • Experienced with lab and field testing, test equipment such as signal generators, spectrum analyzers, and digital logic analyzers.
  • Familiarity with signal processing systems, terrestrial/airborne/satellite transmitter and receiver design including acquisition, tracking and demodulation, MATLAB, C/C++, synthesis, verification/acceptance testing.
  • Individuals with a background developing solutions for military/DoD customers is plus.
  • Provide concise explanation and design documentation of developed firmware implementation to enable team members to support system integration.
  • Identification, development and implementation of FPGA/ASIC IP Cores.
  • Deliver effective briefings and to work efficiently in a multidisciplinary team environment.
  • Travel to support events such as customer site support, training seminar, proposals.
  • Proactively ensure a safe work environment and adhere to company policies and procedures.

Qualifications

  • Bachelor’s degree or Master’s degree, preferable with work experience, in Electrical/Computer Engineering specializing in wireless communications/DSP, system design and new product development.
  • Must be proficient in VHDL or Verilog.

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