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Eda Intern Jobs in California (NOW HIRING)

Software Intern

San Jose, CA · On-site

$31.63 - $58.75/hr

The Cadence Digital and Signoff Group Machine learning team is a high energy team which explores and implements Deep and Machine Learning techniques to Electronic Design Automation [EDA] tools. We ...

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Eda Intern information

What is an EDA intern?

EDA Interns are students or recent graduates who assist in Electronic Design Automation (EDA) tasks within technology or semiconductor companies. They typically work under the guidance of experienced engineers to help design, verify, and optimize electronic circuits and systems using specialized EDA software tools. EDA Interns gain hands-on experience in areas such as schematic design, simulation, verification, and layout, contributing to the development of integrated circuits or printed circuit boards. This role provides valuable industry exposure and can be a stepping stone to full-time positions in electronics or computer engineering.

What types of projects does an EDA intern typically work on, and how do they contribute to the overall team goals?

As an EDA Intern, you can expect to work on projects such as developing and testing scripts for automation, verifying integrated circuit designs, and assisting with the optimization of design flows. Interns often support senior engineers by analyzing data, running simulations, and helping troubleshoot issues within electronic design automation tools. These tasks are essential as they directly contribute to improving the efficiency and accuracy of the design process, allowing the team to meet project deadlines and maintain high-quality standards.

What are the key skills and qualifications needed to thrive as an EDA intern, and why are they important?

To thrive as an EDA (Electronic Design Automation) Intern, you need a solid foundation in electrical engineering concepts, digital design, and proficiency in programming languages such as Python or C++. Familiarity with EDA tools like Cadence, Synopsys, or Mentor Graphics, as well as basic experience with version control systems, is typically required. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with engineering teams and contribute meaningfully to projects. These skills and qualifications are essential for efficiently supporting design workflows, learning complex processes, and adding value to semiconductor or hardware development teams.

What are the most commonly searched types of Eda jobs in California?

The most popular types of Eda jobs in California are:

What job categories do people searching Eda Intern jobs in California look for?

The top searched job categories for Eda Intern jobs in California are:

What cities in California are hiring for Eda Intern jobs?

Cities in California with the most Eda Intern job openings:

Infographic showing various Eda Intern job openings in California as of August 2026, with employment types broken down into 13% Internship, 1% As Needed, 62% Full Time, 21% Part Time, 1% Temporary, and 2% Contract. Highlights an 88% Physical, 3% Hybrid, and 9% Remote job distribution.

Member of Technical Staff - Research Intern

Kindredventures

Palo Alto, CA • On-site

$52 - $70/hr

Other

Posted 4 days ago


Key responsibilities

  • Design and implement Reinforcement Learning experiments such as GRPO, PPO, and DPO, including training data mixes and reward signal explorations.

  • Contribute to research on post-training techniques and run ablation studies to improve model reasoning and alignment capabilities.

  • Analyze experimental results, debug model behavior, and test new algorithms for model fine-tuning and evaluation.


Job description

About Architect

Architect is an AI research and product lab for chip design. We build AI models and systems that can explore, design, optimize, and verify new hardware. Our goal is to reimagine chip design using AI, cut down ASIC design time and cost, and enable a new era of ultra‑efficient, domain‑specific chips powering the future of computation.

Born out of Stanford, our team blends researchers and engineers from Anthropic, DeepMind, Meta, Apple, Intel, and other frontier labs. Backed by leading VCs and angels, including the Chief Scientist at Google, Stanford professors, and founders of chip companies, Architect operates in stealth, pushing the limits of AI4EDA and building the intelligence layer for the hardware revolution.

What You’ll Do

As a Research Intern at Architect, you will spend 3 months working alongside the founding team to push the boundaries of how AI models explore and optimize hardware designs. This is a high‑impact role where your experiments will directly influence our core modeling roadmap.

  • Responsible for co‑designing and implementing the Reinforcement Learning experiments (GRPO/PPO/DPO), training data mixes and reward signal explorations.
  • Contribute to research on post‑training techniques, running ablation studies to improve model reasoning and alignment capabilities.
  • Implement and test new algorithms for model fine‑tuning and evaluation, helping to translate research papers into working prototypes.
  • Analyze experimental results and debug model behavior to help establish best practices for our training recipes.
What We’d Like to See

Qualifications & Skills:

  • Education: Currently pursuing a PhD or Master’s degree in Computer Science, Machine Learning, Mathematics, or a related field. Exceptional undergraduates with strong research experience are also encouraged to apply.
  • RL Knowledge: Strong academic understanding or project experience with Reinforcement Learning (e.g., PPO, DPO, GRPO). You should be comfortable reading and implementing concepts from recent research papers.
  • Coding Proficiency: Strong proficiency in Python and deep learning frameworks (PyTorch). You should be able to write clean, efficient research code.
  • Research Mindset: A fast learner who is comfortable navigating ambiguity. You enjoy analyzing complex problems and iterating quickly on experiments.
  • LLM Familiarity: Experience with training or fine‑tuning Large Language Models (LLMs) or familiarity with the modern NLP stack (Transformers, HuggingFace, etc.).
Bonus:
  • Previous internship experience at frontier AI labs or research organizations.
  • Publications (or submissions) in top ML venues (NeurIPS, ICLR, ICML) or EDA venues (DAC, ICCAD).
  • Familiarity with hardware design concepts (Verilog, RTL, EDA tools), though not required.
What We Offer
  • Competitive internship stipend
  • Mentorship from a team of researchers and engineers from Anthropic, DeepMind, Meta, and Stanford
  • Opportunity to work on 0 to 1 problems in AI‑driven chip design
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