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Dram Engineer Jobs in Portland, OR (NOW HIRING)

Experience with system level performance spanning hardware (CPU, GPU, DRAM, storage), software (OS ... As a member of the Workflow Engineering team, you will also be responsible for continuously ...

Experience with system level performance spanning hardware (CPU, GPU, DRAM, storage), software (OS ... As a member of the Workflow Engineering team, you will also be responsible for continuously ...

... Engineer to join our Memory Controller IP team in Hillsboro, Oregon. The successful candidate will ... Pre-existing Experience / familiarity with DDR DRAM technology a strong preference * Working ...

... Engineer to join our Memory Controller IP team in Hillsboro, Oregon. The successful candidate will ... Pre-existing Experience / familiarity with DDR DRAM technology a strong preference * Working ...

... Engineer to join our Memory Controller IP team in Hillsboro, Oregon. The successful candidate will ... Pre-existing Experience / familiarity with DDR DRAM technology a strong preference * Working ...

SMTS Verification Engineering

Hillsboro, OR ยท Hybrid

$108K - $201K/yr

... Engineer to join our Memory Controller IP team in Hillsboro, Oregon. The successful candidate will ... Pre-existing Experience / familiarity with DDR DRAM technology a strong preference * Working ...

System Performance Engineer

Beaverton, OR ยท On-site

$140 - $200/hr

Experience with system level performance spanning hardware (CPU, GPU, DRAM, storage), software (OS ... As a member of the Workflow Engineering team, you will also be responsible for continuously ...

Design Verification Engineer

Beaverton, OR ยท On-site

$141K - $172K/yr

... DRAM subsystem, memory controller logic - Encode and Decode systems for ProRes and other codec ... programming skills with knowledge of data structures and algorithms Experience with Python, Perl ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

... DRAM subsystem, memory controller logic - Encode and Decode systems for ProRes and other codec ... programming skills with knowledge of data structures and algorithms Experience with Python, Perl ...

Design Verification Engineer

Beaverton, OR ยท On-site

$141K - $172K/yr

... DRAM subsystem, memory controller logic - Encode and Decode systems for ProRes and other codec ... programming skills with knowledge of data structures and algorithms Experience with Python, Perl ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

... DRAM subsystem, memory controller logic - Encode and Decode systems for ProRes and other codec ... programming skills with knowledge of data structures and algorithms Experience with Python, Perl ...

Design Verification Engineer

Beaverton, OR ยท On-site

$110 - $170/hr

Neural Engine hardware, DRAM subsystem, memory controller logic, Encode and Decode systems for ... SW programming skills with knowledge of data structures and algorithms * Experience with Python ...

Design Verification Engineer

Beaverton, OR ยท On-site

$141K - $172K/yr

... DRAM subsystem, memory controller logic - Encode and Decode systems for ProRes and other codec ... programming skills with knowledge of data structures and algorithms Experience with Python, Perl ...

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Dram Engineer information

See Portland, OR salary details

$40.3K

$96K

$159.6K

How much do dram engineer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for dram engineer in Portland, OR is $96,016.00, according to ZipRecruiter salary data. Most workers in this role earn between $75,800.00 and $106,000.00 per year, depending on experience, location, and employer.

What is a DRAM engineer?

DRAM Engineers are specialized professionals who design, develop, test, and optimize Dynamic Random Access Memory (DRAM) chips used in computers and electronic devices. They work on improving memory performance, power efficiency, and reliability, often collaborating with hardware and software teams. Their responsibilities may include circuit design, validation, failure analysis, and process improvement to meet the demands of modern computing applications.

What is the difference between Dram Engineer vs Memory Engineer?

AspectDram EngineerMemory Engineer
CredentialsBachelor's or higher in Electrical Engineering, Computer Engineering, or related fields; certifications like IEEE are commonSimilar educational background; often holds certifications in memory design or semiconductor manufacturing
Work EnvironmentDesign labs, semiconductor fabs, R&D centersDesign labs, semiconductor manufacturing facilities, R&D centers
Industry UsageMemory chip companies, electronics manufacturersMemory chip companies, electronics manufacturers
Job FocusDesign and optimize DRAM modules, ensure performance and reliabilityDesign and develop various types of memory, including DRAM, SRAM, Flash

Both Dram Engineers and Memory Engineers work in similar environments and industries, often sharing educational backgrounds and certifications. While Dram Engineers focus specifically on DRAM technology, Memory Engineers may work on a broader range of memory types. The roles are closely related, with overlapping skills in semiconductor design and testing.

How does a DRAM engineer typically collaborate with cross-functional teams during the memory development process?

As a DRAM Engineer, you'll collaborate closely with teams including circuit design, process engineering, product testing, and firmware development. This collaboration ensures that the DRAM modules meet performance, reliability, and manufacturability standards. Regular meetings, design reviews, and troubleshooting sessions are common, requiring strong communication skills and a willingness to work through technical challenges together. Being proactive in sharing insights and addressing issues early helps streamline product development and supports successful project outcomes.

What are the key skills and qualifications needed to thrive as a DRAM engineer, and why are they important?

To thrive as a DRAM Engineer, you need a solid background in electrical engineering or a related field, with expertise in semiconductor memory design and circuit analysis. Familiarity with tools such as SPICE simulators, CAD/EDA software, and experience with DRAM testing methodologies are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork are crucial soft skills for this role. These competencies are important to ensure the development of reliable, high-performance memory solutions that meet industry standards.
What are popular job titles related to Dram Engineer jobs in Portland, OR? For Dram Engineer jobs in Portland, OR, the most frequently searched job titles are:
What job categories do people searching Dram Engineer jobs in Portland, OR look for? The top searched job categories for Dram Engineer jobs in Portland, OR are:
Infographic showing various Dram Engineer job openings in Portland, OR as of August 2026, with employment types broken down into 92% Full Time, 2% Part Time, and 6% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $96,016 per year, or $46.2 per hour.

Senior FPGA Design Engineer (MTD, Tualatin, OR)

Teradyne

Tualatin, OR โ€ข On-site

$154.90 - $247.80/hr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Posted 24 days ago


Job description

Location: Tualatin, OR; San Jose, CA, US

Opportunity Overview

Teradyneโ€™s Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our growing portfolio of cuttingโ€‘edge memory test solutions. MTD creates advanced solutions for complex testing applications, driving innovation through creativity and diverse perspectives. Our test instrumentation supports the worldโ€™s most advanced memory technologies, combining stateโ€‘ofโ€‘theโ€‘art digital and analog designs, cuttingโ€‘edge ASIC/FPGA technologies, liquid cooling, and highโ€‘performance signal delivery.

Responsibilities
  • Architect and implement FPGA solutions to support next generation Flash and DRAM test instrumentation.
  • Provide technical guidance to junior engineers.
  • Turn abstract concepts and customer requirements into reliable, extensible, and supportable designs.
  • Assist in the maintenance and extension of existing FPGA designs to support quality improvement and emerging customer requirements.
  • Maintain schedule commitments and deliver high quality end products.
  • Occasional travel may be required.
Qualifications
  • B.S. or M.S. in Electrical Engineering or closely related discipline and 8+ years of relevant work experience.
  • Experience with Digital Design and Architecture.
  • RTL coding, synthesis, timing closure and lab validation.
  • Experience with Static Timing Analysis of ASICs or FPGAs.
  • Experience with digital simulation testbench creation.
  • Experience with C or C++.
  • Familiarity with lab equipment such as oscilloscopes, power supplies and waveform generators.
Desired Skills
  • FPGA Transceiver based design experience.
  • Experience with DRAM and Flash Memory interfaces.
  • Experience with Intel/Xilinx FPGA tool flows.
  • Proficiency with Verilog HDL Language.
  • Familiarity with UVM Methodology.
  • Linux and Windows operating systems experience.
  • Familiarity with ATE instrumentation.
Compensation

The base salary range for this role is $154,900โ€“$247,800. This range is a good faith estimate and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

Incentive Plan

This job is eligible for discretionary bonus(es) based on financial performance.

Benefits

Teradyne offers a variety of robust health and wellโ€‘being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.

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