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Dram Design Engineer Jobs in Arizona (NOW HIRING)

ARM

SoC Architect

Chandler, AZ · On-site

$308K - $417K/yr

Design and develop Arm's SoC architecture based on Arm product IP and system architecture to meet ... Work with engineering teams across Arm to coordinate on-time delivery of Arm IP into SoCs, and work ...

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Dram Design Engineer information

What are the key skills and qualifications needed to thrive as a DRAM Design Engineer, and why are they important?

To thrive as a DRAM Design Engineer, you need a solid background in electrical engineering, digital circuit design, and semiconductor physics, usually supported by a relevant engineering degree. Proficiency with hardware description languages (such as Verilog or VHDL), CAD tools, and simulation software is essential, along with familiarity with industry standards like JEDEC. Strong analytical thinking, attention to detail, and effective teamwork set top performers apart in this role. These skills ensure the development of reliable, high-performance memory products that meet stringent industry specifications and market demands.

What does a DRAM Design Engineer do?

A DRAM Design Engineer is responsible for designing and developing Dynamic Random Access Memory (DRAM) chips used in computers, mobile devices, and other electronic products. Their work includes creating circuit layouts, optimizing memory performance, and ensuring power efficiency and reliability. They collaborate with cross-functional teams, run simulations, and support the manufacturing process to ensure the final products meet industry standards.

What are some common challenges a DRAM Design Engineer faces during the memory development cycle?

DRAM Design Engineers often encounter challenges related to optimizing speed, power consumption, and reliability while adhering to strict specifications. Balancing these competing requirements can be complex, especially as process nodes shrink and memory densities increase. Additionally, ensuring signal integrity and minimizing noise in high-speed circuits requires close collaboration with layout, verification, and product engineering teams. Staying up to date with evolving industry standards and debugging unexpected issues during silicon validation are also key aspects of the role.
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Dram Design Engineer jobs near you
SMTS (Product Eng)

SMTS (Product Eng)

Everspin Technologies Inc

Chandler, AZ • On-site

Full-time

Re-posted 12 days ago

Job description

Job Title: Product Engineer – Senior Member of Technical Staff (SMTS)

Product engineer is responsible for NPI development from first Si through qualification and high-volume production ramp.

Employer: Everspin Technologies, Inc.

Department: Backend OPS

Reports To: VP Backend OPS

Terms: Full Time/Exempt/Salary/In Office

About Everspin

Headquartered in Chandler, Arizona, Everspin Technologies (Nasdaq: MRAM) is the worldwide leader in designing, manufacturing, and commercially shipping discrete and embedded Magnetoresistive RAM (MRAM) into markets and applications where data persistence and integrity, low latency, and security are paramount. With over 200 Million MRAM products deployed in data center, cloud storage, energy, industrial, automotive, and transportation markets, Everspin has built the strongest and fastest growing foundation of MRAM users in the world. For more information, visit www.everspin.com.

The Role

Reporting to VP Backend OPS, and based in our Chandler, Arizona headquarters, the SMTS Product engineer is responsible for bringing all new MRAM products(NPI) to market involving pre-Si design spec definitions; first Si verification; datasheet spec validation; developing wafer sort, final test and characterization programs and reliability characterization. Responsibilities include working with Design and Operations teams to create and execute characterization and debug plans for circuit validation, screen development and debug of any non-conformance. Additionally, the group works with the Process and Device teams to develop a yield pareto correlating wafer sort and final test failure mechanisms to bit properties thus defining a path to yield improvement. In addition, during the qualification phase, group responsibilities involve reliability/technology certification (both standard JEDEC and technology specific stresses).


Specific responsibilities will include:

  • First silicon validation, debug, and qualification.
  • Responsible for developing and implementing test plans, ATE test programs, silicon validation, test methodology concepts, multi-site hardware development, product characterization, and high-volume production support.
  • Ability to lead teams and projects.
  • Thrive working in a cross functional environment to define and execute product characterization and validation plans.
  • Knowledge of magnetic tunnel junction (MTJ) materials and devices is a plus.
  • Ability to manage and communicate product qualification plans, timelines, status, and results both internally and to external vendors.
  • Technical point of contact with OEMs and customers

Qualifications & competencies

  • B.S. or M.S. in Physics, Materials Science, or Electrical Engineering
  • Experience with the ATE tests systems, probers and test hardware. Experience with testing memory is a plus (DRAM, FLASH, SRAM or any other emerging memory technology).
  • Proficient in data analysis tools like JMP and programming languages like Python or C.
  • Demonstrated track record of product spec validation, reliability characterization, and qualification.
  • Strong communication skills and the ability to work both independently and in team environment.
  • Excellent analytical, organizational, and project management skills.
  • Detail-oriented, organized approach to performing and reviewing work.
  • Unquestionable ethics – treats people with respect; keeps commitments; inspires the trust of others; works with integrity
  • Commitment to our core values of Leadership, Innovation, Communication, Persistence, Enthusiasm, and Respect

Physical Demands and Work Environment

  • Occasionally required to stand
  • Occasionally required to walk
  • Continually required to sit
  • Continually required to utilize hand and finger dexterity
  • Continually required to talk or hear
  • Continually utilize visual acuity to operate equipment, read technical information,
    and/or use a keyboard
  • Occasionally required to lift/push/carry items less than 25 pounds.