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Job Description:

Le groupe Timing and Communication (TCG) de Microchip recherche activement un ingenieur principal en conception analogique. Les responsabilites couvrent un large eventail d'activites telles que la conception, la simulation et la validation de circuits integres analogiques (CI). Les produits sont generalement des conceptions SoC a signaux mixtes.

L'equipe analogique developpe les blocs IP critiques utilises dans les produits de synchronisation du TCG. Ces circuits comprennent des PLL multi-GHz, des circuits numeriques haute vitesse, des pilotes MEMS ainsi que des pads d'E/S a hautes performances et haute vitesse.

En tant qu'ingenieur en conception analogique et membre de l'equipe Analog IP, vous serez amene a:

Travailler avec les responsables de conception analogique et les architectes afin de concevoir des blocs IP analogiques specifiques.
Simuler des circuits analogiques dans differentes variantes de procede et conditions de fonctionnement.
Developper des modeles de blocs de conception destines a etre integres dans des simulations mixtes analogiques/numeriques au niveau systeme.
Effectuer la validation au niveau bloc des dispositifs issus du procede silicium ainsi que l'evaluation en laboratoire au niveau systeme.

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The Timing and Communication Group (TCG) at Microchip has an open vacancy for principal analog design engineer.

The responsibility spans wide range of activities such as the design, simulation and validation of analog integrated circuits (ICs). The products are usually mixed signal SOC designs.
The Analog team develops the critical IP blocks used in the TCG timing products. These circuits include multi-GHz PLL circuits, high speed digital circuits, MEMS drivers and high-speed performance IO pads.

As an Analog Design Engineer and a member of the Analog IP team, you will:

Work with analog design leads and architects to design specific analog IP blocks.
Simulate analog circuits across process corners and operating conditions.
Develop models of design blocks for inclusion in top-level mixed-signal simulations.
Perform block-level validation of silicon process devices and system-level laboratory evaluation.

Requirements/Qualifications:

Exigences du poste

Maitrise ou doctorat en genie electrique
Minimum de 5 ans d'experience directe dans le domaine des circuits analogiques et mixtes analogiques/numeriques
Experience en conception de circuits analogiques et haute vitesse, notamment dans les domaines suivants : ADC, DAC, filtres, PLL, DLL et interfaces d'E/S haute vitesse
Solides connaissances fondamentales en theorie des circuits, conception et layout
Experience pratique en scripting et en automatisation a l'aide des langages Skill, Python, Perl et Tcl
Bonne maitrise du flot de conception et des outils Cadence IC
Une expertise en conception systeme de circuits mixtes analogiques/numeriques est un atout
Excellente connaissance de Verilog-A pour la modelisation comportementale et la simulation analogique
Bonnes aptitudes en communication et en travail d'equipe, ainsi qu'une experience de collaboration avec des equipes multisites, sont souhaitees

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Master's degree or PhD in electrical engineering
Minimum 5 years of direct experience working on analog and mixed-signal circuits.
High-speed and analog circuit design experience including the following: ADCs, DACs, Filters, PLLs, DLLs, and high-speed I/Os.
Strong fundamentals in circuit theory, design, and layout
Hands-on experience in scripting and automation using skill language, python, Perl and tcl
Strong knowledge in Cadence IC design flow and tools
Expertise in the system design of mixed signal circuits is preferred
Strong knowledgeable in Verilog-A for analog behavioral modeling and simulation
Good communication, teamwork skills and experience working with multi-site teams are desirable

Travel Time:

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.