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Design Verification Intern Jobs in California (NOW HIRING)

Etched

PD Intern

San Jose, CA · On-site

Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... Familiarity with verification work and writing test benches * Familiarity with physical design ...

Etched

PD Intern

San Jose, CA · On-site

Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... Familiarity with verification work and writing test benches * Familiarity with physical design ...

Etched

RTL Intern

San Jose, CA · On-site

Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic ... Familiarity with verification work and writing test benches * Familiarity with physical design ...

Etched

RTL Intern

San Jose, CA · On-site

Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic ... Familiarity with verification work and writing test benches * Familiarity with physical design ...

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Design Verification Intern information

What are the key skills and qualifications needed to thrive as a design verification intern, and why are they important?

To thrive as a Design Verification Intern, you need a solid understanding of digital logic design, computer architecture, and programming, typically supported by coursework in electrical or computer engineering. Familiarity with hardware description languages (such as Verilog or VHDL), simulation tools, and verification methodologies (like UVM or SystemVerilog Assertions) is highly valuable. Strong analytical thinking, attention to detail, and clear communication skills help you collaborate effectively, document findings, and resolve design issues. These competencies are crucial for ensuring high-quality, reliable hardware designs and for contributing meaningfully within engineering teams.

What types of projects or tasks can I expect to work on as a design verification intern?

As a Design Verification Intern, you will typically assist with creating and executing testbenches, developing verification plans, debugging simulation results, and writing scripts to automate testing. You'll work closely with verification engineers and design teams to identify design flaws, validate new features, and help ensure that products meet quality and functional requirements. This hands-on exposure not only deepens your technical skills but also provides insight into the end-to-end hardware development process. You'll frequently collaborate and communicate findings in team meetings, making it a great opportunity to build experience in a real-world engineering environment.

What does a design verification intern do?

A Design Verification Intern assists in testing and validating semiconductor designs to ensure they meet specifications. They work with simulation tools, write testbenches in languages like SystemVerilog, and debug design issues. Interns collaborate with engineers to develop verification plans and automate testing processes. This role provides hands-on experience in hardware design, verification methodologies, and industry tools used in chip development.

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Design Verification Intern jobs near you
Infographic showing various Design Verification Intern job openings in California as of July 2026, with employment types broken down into 87% Full Time, 10% Part Time, and 3% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution.

US 2026 Hardware - Digital Intern

TetraMem - Accelerate The World

San Jose, CA • On-site

$35 - $45/hr

Other

Re-posted 28 days ago

Job description

About the Role
We are seeking a Digital Hardware Intern to support the design, verification, and integration of digital systems in TetraMems AI accelerators. Youll contribute to RTL design, simulations, and performance optimization for real-world AI computing applications.


Responsibilities
Support RTL design using Verilog or SystemVerilog
Assist in writing testbenches and performing functional verification
Collaborate with digital and software teams to integrate and validate system components
Contribute to timing analysis, synthesis, and performance analysis


Qualifications
Currently pursuing a degree in Electrical Engineering, Computer Engineering, or related field
Familiarity with Verilog/SystemVerilog and digital design fundamentals Exposure to simulation tools (e.g., ModelSim, VCS) and scripting (Python, Shell, or Tcl)
Understanding of SoC or ASIC development flow is a plus
Team-oriented with strong communication and documentation skills

Salary Range: $35-45 USD/hr

TetraMem celebrates diversity and is committed to creating an inclusive environment for all employees. We are proud to be an Equal Opportunity Employer and welcome applicants from all backgrounds. Qualified candidates will receive consideration for employment without regard to race, color, religion, creed, sex, gender identity or expression, sexual orientation, national origin, ancestry, age, marital status, medical condition, disability, genetic information, military or veteran status, or any other characteristic protected by applicable federal, state, or local law.
TetraMem is committed to providing reasonable accommodations to qualified applicants with disabilities throughout the recruitment process. Applicants requiring accommodation may contact Human Resources for assistance.
To ensure a fair, consistent, and efficient hiring process, all candidates must apply through TetraMems official ClearCompany Applicant Tracking System (ATS). Applications submitted through the ATS allow our hiring team to evaluate candidates using a standardized process and ensure timely communication throughout the recruitment process. To promote equal consideration for all applicants, applications submitted outside of the ClearCompany ATS, including direct emails, LinkedIn messages, or unsolicited submissions to employees, may not be reviewed or considered.
We encourage all interested candidates to apply through the official TetraMem Careers page.

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