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Design Verification Engineer Jobs in Raleigh, NC

Nvidia

Senior ASIC Verification Engineer

Durham, NC · On-site

We are now looking for a Senior Verification Engineer for our Memory Management Unit. NVIDIA is ... As a senior member of our verification team, you'll understand the design & implementation with ...

Nvidia

Senior ASIC Verification Engineer

Durham, NC · Hybrid

NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have a real ...

Apple

RTL Design Engineer

Cary, NC · On-site

You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ... Bachelors of Science in Electrical Engineering. Proven knowledge of RTL design, Verilog and ...

Apple

RTL Design Engineer

Cary, NC · On-site

You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...

Apple

RTL Design Engineer

Cary, NC

You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...

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All JobsDesign Verification Engineer JobsDesign Verification Engineer Jobs in Raleigh, NC

Design Verification Engineer information

See Raleigh, NC salary details

$102.6K

$145K

$162.3K

How much do design verification engineer jobs pay per year?

As of Jun 19, 2026, the average yearly pay for design verification engineer in Raleigh, NC is $144,986.00, according to ZipRecruiter salary data. Most workers in this role earn between $132,200.00 and $161,400.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Design Verification Engineer position, and why are they important?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What engineers make $500,000?

Senior engineers in specialized fields such as software engineering, petroleum engineering, and certain aerospace roles can earn $500,000 or more annually, especially with experience, bonuses, and stock options. High-level positions often require advanced skills, certifications, and leadership responsibilities.

How much does a design verification engineer earn?

A design verification engineer's salary typically ranges from $70,000 to $130,000 annually, depending on experience, location, and industry. Senior roles or those with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $150,000.

How much do design verification engineers make in the US?

Design verification engineers in the US typically earn a median annual salary of around $100,000 to $130,000, depending on experience, location, and industry. Entry-level positions may start lower, while experienced engineers with specialized skills or certifications can earn higher salaries, especially in high-demand sectors like semiconductor or electronics design.

What is a Design Verification Engineer job?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What are the most common challenges faced by Design Verification Engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

What is a design verification engineer?

A design verification engineer is responsible for ensuring that electronic or hardware designs meet specified requirements and function correctly. They develop and execute test plans, use simulation tools, and analyze results to identify and fix design issues before production. This role often requires knowledge of scripting, testing methodologies, and industry standards such as ISO or IEEE.
What are the most commonly searched types of Design Verification Engineer jobs in Raleigh, NC? The most popular types of Design Verification Engineer jobs in Raleigh, NC are:
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Design Verification Engineer jobs near you
Infographic showing various Design Verification Engineer job openings in Raleigh, NC as of June 2026, with employment types broken down into 93% Full Time, 3% Part Time, 1% Temporary, and 3% Contract. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $144,986 per year, or $69.7 per hour.
Senior Engineer, Design Verification

Senior Engineer, Design Verification

Marvell

Morrisville, NC

$127K - $155K/yr

Full-time

Life, Retirement

Posted 9 days ago

Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's CXL Product Development team works on groundbreaking innovations for the composable datacenter. We are looking for individuals with a deep understanding and passion for ASIC verification to craft creative solutions for DV architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. If you're creative and autonomous, we want to hear from you! At Marvell, you will have the opportunity to shape some of the most incredible products to address the needs of the next generation datacenters.

What You Can Expect

Developverification plans for complex designs.Verifycomplex SoCs through simulation of register-transfer level (RTL) and gate level designs using industry standard tools and processes.Collaborate closely with design and other verification engineers to develop and implement verification test plans and drive verificationmethodologywork. Develop constrained-random verification test environment using Verilog/System Verilog, UVM and C programming, including testbenches, checkers, monitors, drivers and other testbench components.Use problem solving skills to debug failing simulations and create test vectors and testing scenarios to exhaustively exercise a design. Drive and analyze test coverage metrics.

What We're Looking For

BS in Electrical/Computer Engineering with 2 years of relevant experience

Or MS in Electrical/Computer Engineering

Must have work/internship experience or completed graduate coursework/research in each of the following:

Synopsys VCS (simulation).

Synopsys Verdi (debugging and waveform analysis).

Verilog, SystemVerilog, UVM.

C/C++ and Python scripting.

RTL Design Debug.

Functional Verification, Assertion-Based Verification, Constrained Random Verification.

AMBA AXI4 Protocol. PCIe fundamentals.

Developing test plans and coverage models. Advanced Computer Architecture concepts.

Expected Base Pay Range (USD)

97,700 - 144,410, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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