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Defect Metrology Engineer Jobs in Arizona (NOW HIRING)

ASM

Senior Metrology Engineer

Phoenix, AZ · On-site

We are seeking an R&D Metrology Engineer to join our dynamic materials development labs. The ideal ... and defect inspection tools. * Solid understanding of semiconductor processing and device ...

ASM

Senior Metrology Engineer

Phoenix, AZ · On-site

We are seeking an R&D Metrology Engineer to join our dynamic materials development labs. The ideal ... and defect inspection tools. * Solid understanding of semiconductor processing and device ...

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Defect Metrology Engineer information

What is a defect metrology engineer?

A Defect Metrology Engineer is responsible for detecting, analyzing, and monitoring defects in semiconductor manufacturing processes using advanced metrology equipment. They develop inspection strategies, improve defect detection sensitivity, and collaborate with process engineers to enhance yield and product quality. Their role involves working with various metrology tools, data analysis software, and statistical methods to ensure that defects are identified and addressed efficiently.

What are the daily responsibilities of a defect metrology engineer?

A Defect Metrology Engineer typically spends their day operating and maintaining advanced inspection equipment, analyzing defect data, and collaborating closely with process and yield engineers to identify and resolve manufacturing issues. You may also be involved in designing experiments, implementing measurement methodologies, and preparing technical reports to communicate findings with engineering teams. Regular tasks include troubleshooting tool errors, validating defect classifications, and participating in cross-department meetings. This hands-on and analytical position requires a mix of independent analysis and teamwork to help optimize production quality and efficiency.

What skills and qualifications are needed to thrive as a defect metrology engineer?

To thrive as a Defect Metrology Engineer, you need a solid background in physics, materials science, or engineering, often with a bachelor's or master's degree and experience in semiconductor manufacturing or advanced inspection. Expertise in metrology tools such as SEMs (Scanning Electron Microscopes), automated defect inspection systems, and data analysis software like JMP or MATLAB is typically required. Attention to detail, problem-solving skills, and effective cross-functional communication are critical soft skills for this role. These abilities ensure precise identification and analysis of defects, driving yield improvements and supporting quality assurance in high-tech manufacturing environments.

What are the most commonly searched types of Defect Metrology Engineer jobs in Arizona?

The most popular types of Defect Metrology Engineer jobs in Arizona are:

What are popular job titles related to Defect Metrology Engineer jobs in Arizona?

For Defect Metrology Engineer jobs in Arizona, the most frequently searched job titles are:

What job categories do people searching Defect Metrology Engineer jobs in Arizona look for?

The top searched job categories for Defect Metrology Engineer jobs in Arizona are:

What cities in Arizona are hiring for Defect Metrology Engineer jobs?

Cities in Arizona with the most Defect Metrology Engineer job openings:

Defect Metrology Engineer jobs near you
Infographic showing various Defect Metrology Engineer job openings in Arizona as of August 2026, with employment types broken down into 92% Full Time, 3% Part Time, 2% Temporary, and 3% Contract. Highlights an 85% Physical, 6% Hybrid, and 9% Remote job distribution.

Substrate Packaging Defect Metro Tool Owner

Phoenix, AZ • On-site

Intel Corporation
Manufacturing • 10K+ employees

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

18th of 159 rated electronics manufacturers

Great coworkers

People enjoy working here

Good employer

Learn more about Intel Corporationexternal

Full-time

Medical, Retirement, PTO

Posted 7 days ago

Job description

Job Details:
Job Description:
We are seeking a motivated and skilled engineer to join our SPTD Yield team as a Defect Metrology Engineer. In this role, you will help drive innovation in EMIB-T, glass core, EMIB scaling, and panel-level packaging technologies for substrate as well as assembly test mfg (ATM) factories for Intel's IPG and IFS customers. Our goal is to be the supplier of choice for advanced, cost-effective substrate packaging by developing leading-edge systems, process capabilities, and inspection technologies to achieve top yields. Join us on our mission to make Intel a great workplace and industry leader.
Responsibilities included but not limited to the following:
  • Use defect inspection tools to detect and resolve process issues, collaborating with defect reduction, process integration, and module teams to improve yield. Apply real-time data analysis, reporting, and DOE summaries to guide improvements and decision-making.
  • Maintain flexibility and adaptability to support the evolving demands in Yield space, responding to new challenges and requirements as they arise.
  • Direct next-generation tool installation, reaching major milestones-purchase-spec development, source inspection, design, pre-fac, Safety level approval, Supplier qual, Intel qual, etc.-by collaborating with diverse stakeholders.
  • Demonstrate the ability to manage work independently, proactively identifying and resolving issues with minimal supervision, and providing leadership in defect metrology and Yield enhancement initiatives.
  • Work with factory teams and module partners to maintain WIP velocity targets in your area. Develop and roll out procedures and equipment setups for defect metrology tools to ensure they meet quality goals. Set up data flows for new tools by connecting them to automation and yield analysis systems, guaranteeing smooth performance and reliable data.
  • Create and outline equipment roadmaps that support capabilities matching program requirements for new substrate technologies. Collaborate with equipment suppliers and Supply chain partners to maintain current toolsets and enhance features, such as software and hardware upgrades, to satisfy Substrate packaging program objectives.
  • Present critical tool and system capabilities developed to meet program deliverables to APTM leadership, showcasing both defect metrology and micro-contamination expertise, and demonstrating a strong capacity for independent leadership, adaptability, and proactive problem-solving in a fast-paced, evolving environment.
  • Performs descriptive statistical analysis, develops visualizations, applications, dashboards, or presentations and communicates insights in a clear and effective way to help the organization with better decision-making.
  • Organizes, interprets and structures insights from data, detects data anomalies and makes corrections.

Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications:
  • Must possess a bachelor's degree in electrical engineering, Chemical Engineering, Optical Engineering, Materials Science, Physics or related field of study and 3 years of semi-conductor experience, OR
  • Master's degree in electrical engineering, Chemical Engineering, Optical Engineering, Materials Science, Physics or related field of study and 2 years of Semi-Conductor experience, OR
  • PhD Degree in Electrical Engineering, Chemical Engineering, Optical Engineering, Materials Science, Physics or related field of study and 1+ years of Semi-Conductor experience
  • Previous experience in micro-contamination management within a semiconductor manufacturing setting
  • Experience as a Yield Analyst OR Defect reduction owner Or with Defect metrology tool ownership
  • Strong programming skills in Python.

Preferred Qualifications:
  • Knowledge of statistics and experimental design and the skills to apply that knowledge tool qualification, and process development.
  • Demonstrated understanding of semiconductor process flows and/or defect metrology assessment based on process requirements.
  • Requirements listed would be obtained through a combination of industry-related job experience, internship experience, and schoolwork/classes/research.

Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $103,730.00-198,820.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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