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Cpu Rtl Design Engineer Jobs in Madison, AL (NOW HIRING)

EndoSec LLC

FPGA Engineer

Huntsville, AL · On-site

$128K - $164K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

EndoSec LLC

FPGA Engineer

Huntsville, AL · On-site

$128K - $164K/yr

Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

Peraton

Virtual Desktop Engineer

Huntsville, AL · On-site

... CPU usage, disk usage, and response times to maintain operating efficiency. • Assess and ... design and implementation to mitigate performance and cybersecurity risks. • Perform systems ...

Peraton

Virtual Desktop Engineer

Huntsville, AL · On-site +1

$80K - $128K/yr

Monitor and manage enterprise system resources, including CPU usage, disk usage, and response times ... Assess and remediate the enterprise design and implementation to mitigate performance and ...

Peraton

Virtual Desktop Engineer

Huntsville, AL · On-site

Monitor and manage enterprise system resources, including CPU usage, disk usage, and response times ... Assess and remediate the enterprise design and implementation to mitigate performance and ...

Peraton

Virtual Desktop Engineer

Huntsville, AL · On-site

Monitor and manage enterprise system resources, including CPU usage, disk usage, and response times ... Assess and remediate the enterprise design and implementation to mitigate performance and ...

All JobsCpu Rtl Design Engineer JobsCpu Rtl Design Engineer Jobs in Madison, AL

Cpu Rtl Design Engineer information

See Madison, AL salary details

$36.3K

$79K

$142K

How much do cpu rtl design engineer jobs pay per year?

As of Jul 14, 2026, the average yearly pay for cpu rtl design engineer in Madison, AL is $78,980.00, according to ZipRecruiter salary data. Most workers in this role earn between $60,900.00 and $88,300.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
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Cpu Rtl Design Engineer jobs near you
FPGA Verification Engineer with Security Clearance

FPGA Verification Engineer with Security Clearance

Innovien Solutions

Huntsville, AL • On-site

$122K - $168K/yr

Contractor

Posted 21 days ago

Job description

FPGA VERIFICATION ENGINEER We're looking for a Secret-cleared FPGA Verification Engineer to support a confidential defense program focused on missile defense. An FPGA is a configurable chip, and this role is focused on verifying the RTL (the code that tells the chip how to behave) rather than board level design work. This is verification at the deep end, working on the actual chip. The test environment is built and the design is locked, so you skip the setup and go straight to the work that matters: running the cases and stimulus that prove the RTL behaves exactly like it has to. You will be in the SCIF with a sharp team, owning the verification that everything downstream depends on. REQUIREMENTS:
- 6+ years hands on FPGA verification, spent in functional verification rather than RTL design or board bring up
- Proven chip level verification running against completed RTL code, executing directed and constrained random test cases to prove functional behavior against the design spec (not board or card level FPGA work)
- Strong working knowledge of UVM in SystemVerilog, with the independence to build and run stimulus, triage failures, and work verification problems to resolution on their own
- Hands on Synopsys VCS for functional simulation, testbench execution, and RTL debug, comfortable driving regressions and reading coverage reports to close coverage PREFERRED SKILLS:
- Verdi for waveform analysis and debug alongside VCS, plus Vivado experience for working within the Xilinx/AMD FPGA toolchain
- Questa or ModelSim simulation experience for functional verification, testbench execution, and RTL debug
- Prior verification experience on defense, aerospace, or other cleared programs in a classified environment
- Familiarity with Lint for code quality checks and CDC (clock domain crossing) analysis to catch timing issues across asynchronous domains RESPONSIBILITIES:
- Execute directed and constrained-random test cases and stimulus against completed FPGA RTL code to verify chip-level functional behavior against design specifications
- Run functional simulations in the established VCS verification environment, analyze results, and debug failures using waveform analysis and coverage reports
- Identify, document, and work failures to resolution alongside the RTL design team, troubleshooting verification challenges as they surface
- Re-run regression suites as design changes come through to confirm fixes hold and nothing downstream breaks
- Support verification across program assemblies through the build and verification phase, including extended verification work as design changes are finalized

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