FPGA Engineer
$128K - $164K/yr
Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
$128K - $164K/yr
Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
$128K - $164K/yr
Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Chicago, IL · On-site
$180 - $220/hr
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Chicago, IL · On-site
$180 - $220/hr
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Mundelein, IL · On-site
As an Eliyan Staff DFT Engineer, you will be working at a fast-paced early-stage startup creating ... at the RTL & gate level * General knowledge of digital and AMS circuit design techniques
Quick apply
Mundelein, IL · On-site
As an Eliyan Staff DFT Engineer, you will be working at a fast-paced early-stage startup creating ... at the RTL & gate level * General knowledge of digital and AMS circuit design techniques
Schaumburg, IL · On-site
$127K - $164K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Schaumburg, IL · On-site
$127K - $164K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Chicago, IL · On-site
$133K - $172K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Chicago, IL · On-site
$133K - $172K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Chicago, IL · On-site
$200K/yr
PTO
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Chicago, IL · On-site
$200K/yr
PTO
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Chicago, IL · On-site +1
... CPU cores at your disposal. Responsibilities * Design, develop, and maintain high-performance ... Knowledge of systems programming, algorithms, data structures, multithreading, networked I/O ...
Quick apply
Chicago, IL · On-site +1
... CPU cores at your disposal. Responsibilities * Design, develop, and maintain high-performance ... Knowledge of systems programming, algorithms, data structures, multithreading, networked I/O ...
Chicago, IL · On-site
$180 - $220/hr
PTO
Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ... Must have proficient experience in Verilog, SystemVerilog, VHDL or other RTL programming ...
Chicago, IL · On-site
$180 - $220/hr
PTO
Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ... Must have proficient experience in Verilog, SystemVerilog, VHDL or other RTL programming ...
Chicago, IL · On-site
$225K - $300K/yr
... CPU and memory architecture, lock-free concurrency, and low-latency networking to push our systems ... Design and implement highperformance components for market data ingestion, normalization, and ...
Chicago, IL · On-site
$225K - $300K/yr
... CPU and memory architecture, lock-free concurrency, and low-latency networking to push our systems ... Design and implement highperformance components for market data ingestion, normalization, and ...
Joining the R&D team, this role offers motivated engineers the opportunity to design, build, and optimize large-scale infrastructure, including triple-digit petabyte-scale storage and massive CPU and ...
Joining the R&D team, this role offers motivated engineers the opportunity to design, build, and optimize large-scale infrastructure, including triple-digit petabyte-scale storage and massive CPU and ...
Chicago, IL · On-site
$225K - $300K/yr
... CPU and memory architecture, lock-free concurrency, and low-latency networking to push our systems ... Design and implement high-performance components for market data ingestion, normalization, and ...
Chicago, IL · On-site
$225K - $300K/yr
... CPU and memory architecture, lock-free concurrency, and low-latency networking to push our systems ... Design and implement high-performance components for market data ingestion, normalization, and ...
Chicago, IL · On-site
$225K - $300K/yr
... CPU and memory architecture, lock-free concurrency, and low-latency networking to push our systems ... Design and implement high-performance components for market data ingestion, normalization, and ...
Chicago, IL · On-site
$225K - $300K/yr
... CPU and memory architecture, lock-free concurrency, and low-latency networking to push our systems ... Design and implement high-performance components for market data ingestion, normalization, and ...
Cary, IL · On-site
$117K - $118K/yr
Medical
Dental
Vision
Retirement
PTO
... Engineering to assure effective and efficient projectexecution Education and Experience * hands-on ... digital design from Architecture (schematics and RTL) to GDS * MSEE preferred Key competencies ...
Cary, IL · On-site
$117K - $118K/yr
Medical
Dental
Vision
Retirement
PTO
... Engineering to assure effective and efficient projectexecution Education and Experience * hands-on ... digital design from Architecture (schematics and RTL) to GDS * MSEE preferred Key competencies ...
Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ... Must have proficient experience in Verilog, SystemVerilog, VHDL or other RTL programming ...
Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ... Must have proficient experience in Verilog, SystemVerilog, VHDL or other RTL programming ...
Chicago, IL · On-site
$150K - $250K/yr
Medical
Dental
Vision
Life
Retirement
Solid Hardware Engineering experience, especially with FPGA * Highly autonomous with a can-do ... Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing ...
Chicago, IL · On-site
$150K - $250K/yr
Medical
Dental
Vision
Life
Retirement
Solid Hardware Engineering experience, especially with FPGA * Highly autonomous with a can-do ... Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing ...
Chicago, IL · On-site
$60 - $75/hr
This role is responsible for the design, administration, automation, security, and modernization of ... Monitor resource utilization including CPU, memory, storage, and network consumption. * Develop ...
Chicago, IL · On-site
$60 - $75/hr
This role is responsible for the design, administration, automation, security, and modernization of ... Monitor resource utilization including CPU, memory, storage, and network consumption. * Develop ...
Chicago, IL · On-site
$200K/yr
PTO
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Chicago, IL · On-site
$200K/yr
PTO
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Chicago, IL · On-site
$200K/yr
PTO
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Chicago, IL · On-site
$200K/yr
PTO
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Schaumburg, IL · On-site
$50.50 - $65.50/hr
Medical
Dental
Vision
PTO
Experience with * Performance profiling (CPU/memory) * Load testing techniques * Distributed ... Data pipeline design * Familiarity with: * Terraform * Monitoring tools (Datadog, CloudWatch)
Schaumburg, IL · On-site
$50.50 - $65.50/hr
Medical
Dental
Vision
PTO
Experience with * Performance profiling (CPU/memory) * Load testing techniques * Distributed ... Data pipeline design * Familiarity with: * Terraform * Monitoring tools (Datadog, CloudWatch)
Experience with physical design tools (Cadence Innovus, Synopsys ICC2, Siemens Calibre) and RTL\u0002to-GDSII flows * Strong programming/scripting: Python, C/C++, Tcl, Shell (bash); Verilog/VHDL ...
Quick apply
Experience with physical design tools (Cadence Innovus, Synopsys ICC2, Siemens Calibre) and RTL\u0002to-GDSII flows * Strong programming/scripting: Python, C/C++, Tcl, Shell (bash); Verilog/VHDL ...
$41.5K - $52.5K
2% of jobs
$52.5K - $63.5K
11% of jobs
$69.4K is the 25th percentile. Wages below this are outliers.
$63.5K - $74.5K
23% of jobs
The median wage is $81.6K / yr.
$74.5K - $85.5K
22% of jobs
$85.5K - $96.5K
17% of jobs
$96.8K is the 75th percentile. Wages above this are outliers.
$96.5K - $107.5K
9% of jobs
$107.5K - $118.5K
6% of jobs
$118.5K - $129.5K
3% of jobs
$129.5K - $140.5K
3% of jobs
$140.5K - $151.5K
2% of jobs
$151.5K - $162.5K
1% of jobs
$41.5K
$90.4K
$162.5K
| Aspect | Cpu Rtl Design Engineer | Cpu Verification Engineer |
|---|---|---|
| Primary Focus | Designing and developing RTL code for CPU components | Verifying and testing RTL designs for correctness |
| Skills & Certifications | HDL languages (Verilog/VHDL), FPGA/ASIC design experience | HDL, testbench development, simulation tools |
| Work Environment | Design teams, hardware development labs | Verification teams, simulation environments |
| Industry Usage | Semiconductor companies, CPU design firms | ASIC/FPGA verification, chip validation |
While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.
For Cpu Rtl Design Engineer jobs in Buffalo Grove, IL, the most frequently searched job titles are:
Cities near Buffalo Grove, IL with the most Cpu Rtl Design Engineer job openings:
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RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System Integration, Hardware Security, Xilinx, Simulation, IP core, Versal, Stratix, concept to deployment, Vivado, GHDL, Questa, Quartus Prime, Zynq, Agilex, AXI, ACE, Avalon, FPGA verification tools, reverse engineering, cocotb, pyuvm
Full Time
Travel required to 10%.
Must be able to apply for and maintain a U.S. Government Security Clearance
FPGA Engineer
The EndoSec FPGA Engineer is responsible for the design, development, testing, and maintenance of IP cores and FPGA-based systems used in hardware security applications.
Key Responsibilities
FPGA Design and Development: Design and develop IP cores and FPGA configurations implementing the latest in leakage-resilient hardware cryptography algorithms using state-of-the-art FPGA hardware.
Modeling and Simulation: Use simulation tools and verification frameworks to ensure mathematically-correct logic before hardware deployment.
Hardware/Software Design: Work closely with other engineers to integrate FPGA designs with application software and embedded systems. Implement embedded software-based testing solutions where applicable to validate FPGA designs.
Performance Optimization: Optimize FPGA designs for timing, resource utilization, and throughput. Identify and resolve system bottlenecks.
Testing and Validation: Create comprehensive test and verification plans for FPGA components, conduct unit and integration testing, and validate hardware performance against requirements in a remote environment.
System Integration: Ensure seamless integration between internally-developed and third-party IP cores, FPGA designs, and embedded systems. Collaborate with other engineers to develop and maintain system-level architecture.
Troubleshooting and Debugging: Utilize debugging tools and techniques to diagnose and resolve issues within FPGA designs and hardware platforms.
Documentation: Prepare detailed documentation, including design specifications, testing protocols, and user guides, to support system development and maintenance.
Continuous Learning: Actively stay up-to-date with the latest advancements in FPGA technology and hardware security to continually refine and enhance system capabilities.
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Guided missile and space vehicle manufacturing
11 - 50 Employees
Washington, DC, US
2013