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Avm Jobs in Ohio (NOW HIRING)

Senior FPGA Engineer

Cincinnati, OH · On-site

$106K - $197K/yr

Knowledge using SystemVerilog for verification with AVM, VMM, OVM, or UVM a plus. :: Developing C# source code targeting enhanced Flash Microcontrollers. :: Good English knowledge (speech and writing ...

Hardware Engineer

Cincinnati, OH · On-site

$120K - $160K/yr

Knowledge using SystemVerilog for verification with AVM, VMM, OVM, or UVM a plus. Developing C# source code targeting enhanced Flash Microcontrollers. Good English knowledge (speech and writing). Be ...

Treatments include single lesion, multimet (single iso), trigem, AVM. RTSafe gel dosimetry used for annual end to end testing SBRT: free breathing, gated, triggered imaging, and breath-hold treatment ...

Treatments include single lesion, multimet (single iso), trigem, AVM. RTSafe gel dosimetry used for annual end to end testing SBRT: free breathing, gated, triggered imaging, and breath-hold treatment ...

Treatments include single lesion, multimet (single iso), trigem, AVM. RTSafe gel dosimetry used for annual end to end testing SBRT: free breathing, gated, triggered imaging, and breath-hold treatment ...

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Showing results 1-20

Avm information

See Ohio salary details

$9

$56

$81

How much do avm jobs pay per hour?

As of Jul 26, 2026, the average hourly pay for avm in Ohio is $56.67, according to ZipRecruiter salary data. Most workers in this role earn between $47.31 and $65.14 per hour, depending on experience, location, and employer.

What is an AVM job?

An AVM (Automated Valuation Model) job typically involves using technology and data analysis to estimate property values. Professionals in this field work with real estate data, algorithms, and statistical models to generate accurate and automated property valuations. AVM jobs are common in the real estate, banking, and financial industries, where quick and consistent property assessments are needed. Responsibilities may include data analysis, model development, and validation to ensure valuation accuracy.

What are typical challenges faced by professionals working as AVMs in the real estate or finance industries?

Professionals in AVM roles often face challenges related to maintaining the accuracy of valuations amidst rapidly shifting market conditions and ensuring data integrity when handling large datasets. Balancing technical expertise with clear communication is important, as findings often need to be presented to stakeholders with varying degrees of technical knowledge. Keeping up with advancements in automated valuation technologies and regulatory updates can also be demanding. However, continued learning and collaboration with appraisal, analytics, and risk management teams support effective problem-solving and professional growth in this dynamic field.

What are the key skills and qualifications needed to thrive in the Avm position, and why are they important?

To thrive as an AVM (Asset Valuation Manager or Automated Valuation Model Analyst), you need a strong background in real estate, data analysis, and financial modeling, typically supported by a relevant degree such as finance, economics, or mathematics. Familiarity with statistical analysis tools, AVM software platforms, and proficiency in Excel or programming languages like Python or R is important. Strong analytical thinking, attention to detail, and clear communication abilities are crucial for collaborating with cross-functional teams and interpreting complex data. These skills ensure accurate asset valuations, support sound business decisions, and enhance organizational credibility.

Infographic showing various Avm job openings in Ohio as of July 2026, with employment types broken down into 1% Locum Tenens, 80% Full Time, 10% Part Time, and 9% Contract. Highlights an 95% Physical, 2% Hybrid, and 3% Remote job distribution, with an average salary of $117,881 per year, or $56.7 per hour.

Associate, FPGA / ASIC Verification Engineer

L3HHCM20

Cincinnati, OH

$118K - $162K/yr

Other

Posted 25 days ago


Job description

Job Title: Associate, FPGA / ASIC Verification Engineer

Job Code:40384

Job Location: Cincinnati, OH 

Job Schedule: 4/10:Employees work 10 hour days, 4 days a week 

Job Description:

As an Associate ASIC/FPGA Verification Engineer at L3Harris you will be responsible for verifying the architecture, design and implementation of next generation Electronic Safe and Arm Devices utilizing the latest state of the art tools and technologies.

The ideal candidate for this role would share our passion for creating and innovating new technologies in a highly dynamic, fast-paced environment. We are looking for highly talented, motivated, and versatile engineers that can create the next generation fuzing solutions.

ASIC / FPGA designs will include various sensor interfaces, sequence verification, A/D and D/A interfaces, communication protocols, state machines, timer chains, etc. used in Electronic Safe and Arm Devices (Fuzes) for DOD weapon systems. Microchip/Microsemi Antifuse and Flash are our targeted FPGAs with occasional ASIC development, Siemens Mentor Graphics QuestaSim Prime is our simulation tool, and the System Verilog UVM framework is the current verification environment.  The primary responsibilities will focus on Verilog FPGA design verification, and the System Verilog UVM framework verification.

Essential Functions:

  • Analysis of the requirements, architecture definition, design and debug of FPGA and associated hardware and microcontroller products and associated firmware.
  • Developing Verilog HDL targeting Antifuse and enhanced Flash FPGAs.
  • Developing C# source code targeting enhanced Flash Microcontrollers.
  • Performing effective analysis of functional issues or performance profiling with the hardware and firmware in test environments or target host systems.
  • Contribute to process improvements to ensure hardware-firmware quality and time-to-market.

Qualifications:

  • To be eligible, applicants must be pursuing a bachelor's degree in electrical engineering, Electrical Engineering Technology, Computer Science or related field or have completed their bachelor's degree within the last 12 months, regardless of age.

Preferred Additional Skills:

  • Knowledge using Verilog for Logic Design.
  • Knowledge using SystemVerilog for verification with AVM, VMM, OVM, or UVM a plus
  • Programming experience in C for embedded systems, including development of algorithms, manipulation of data structures, and implementing highly optimized code.
  • Experience with lab tools: Logic Analyzers, oscilloscopes, JTAG/ICE debuggers and protocol analyzers.