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Associate Asic Verification Engineer Jobs in Mount Prospect, IL

Fermilab

Jr. ASIC Design Engineer

Batavia, IL · On-site

$70K - $93K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and ... Executing physical and functional circuit and system verification. * Preparing documentation and ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $168K/yr

IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next ... verification, and system-level thinking. You'll contribute across the ASIC development lifecycle ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $167K/yr

IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next ... verification, and system-level thinking. You'll contribute across the ASIC development lifecycle ...

IMC

Hardware Engineer

Chicago, IL · On-site

$127K - $167K/yr

IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next ... verification, and system-level thinking. You'll contribute across the ASIC development lifecycle ...

Wolverine

FPGA Engineer

Chicago, IL · On-site

$120K - $170K/yr

Proficiency verifying designs through simulation and building verification environments * In-depth ... FPGA and/or ASIC designs required * No prior experience in the finance industry required Job ...

Wolverine Worldwide

FPGA Engineer

Chicago, IL · On-site

$120K - $170K/yr

Proficiency verifying designs through simulation and building verification environments * In-depth ... ASIC designs required * No prior experience in the finance industry required Our flat ...

Wolverine

FPGA Engineer

Chicago, IL

Proficiency verifying designs through simulation and building verification environments * In-depth ... FPGA and/or ASIC designs required * No prior experience in the finance industry required Job ...

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Showing results 1-20

All JobsAssociate Asic Verification Engineer JobsAssociate Asic Verification Engineer Jobs in Mount Prospect, IL

Associate Asic Verification Engineer information

See Mount Prospect, IL salary details

$104.8K

$148.2K

$165.9K

How much do associate asic verification engineer jobs pay per year?

As of Aug 28, 2026, the average yearly pay for associate asic verification engineer in Mount Prospect, IL is $148,178.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,100.00 and $164,900.00 per year, depending on experience, location, and employer.

What is the difference between Associate Asic Verification Engineer vs Digital Design Engineer?

AspectAssociate Asic Verification EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or Computer Engineering; knowledge of verification toolsBachelor's or higher in Electrical Engineering or Computer Engineering; focus on digital circuit design
Work EnvironmentVerification teams within semiconductor or tech companies, using simulation and verification toolsDesign teams creating digital circuits, using HDL languages like VHDL or Verilog
Employer & Industry UsageCommon in semiconductor, electronics, and tech companiesPrevalent in semiconductor, consumer electronics, and hardware development firms

The Associate Asic Verification Engineer primarily focuses on verifying ASIC designs through simulation and testing, ensuring functionality and performance. In contrast, the Digital Design Engineer is responsible for designing digital circuits and implementing hardware logic. Both roles require a strong background in digital electronics, but verification emphasizes testing and validation, while design emphasizes creation and implementation of digital systems.

What job categories do people searching Associate Asic Verification Engineer jobs in Mount Prospect, IL look for?

The top searched job categories for Associate Asic Verification Engineer jobs in Mount Prospect, IL are:

What cities near Mount Prospect, IL are hiring for Associate Asic Verification Engineer jobs?

Cities near Mount Prospect, IL with the most Associate Asic Verification Engineer job openings:

Associate Asic Verification Engineer jobs near you
Infographic showing various Associate Asic Verification Engineer job openings in Mount Prospect, IL as of August 2026, with employment types broken down into 1% As Needed, 65% Full Time, 31% Part Time, 2% Temporary, and 1% Contract. Highlights an 94% Physical, 1% Hybrid, and 5% Remote job distribution, with an average salary of $148,178 per year, or $71.2 per hour.

Solution Director- SOC & ASIC Design Services

Mundelein, IL • On-site

Pump Dynamics
Facilities Support Services • 11 - 50 employees
Learn more about Pump Dynamicsexternal

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Job description

Scope & Responsibilities

Our client, a leading global technology and engineering services organization, is seeking a senior technical leader to define and shape solution strategy across complex SoC and ASIC design engagements.

This is a senior individual contributor role serving as a primary technical authority in pre-sales and solutioning environments. The leader will partner directly with semiconductor clients to shape pursuit strategy, lead technical discovery, architect solutions, and ensure proposals are grounded in credible engineering and delivery frameworks. This role does not carry a sales quota.

Key Responsibilities

  • Lead technical solutioning for ASIC and SoC design pursuits, from initial discovery and scoping through proposal development and client presentations.
  • Define engagement models and delivery architectures spanning RTL design, DFT, physical design, signoff, verification, and tape-out support.
  • Develop differentiated technical solutions across synthesis, place-and-route, functional verification, formal verification, and low-power design.
  • Engage directly with chip architects, design leaders, and engineering executives to understand technical requirements, program objectives, and tool environments.
  • Develop reusable solution patterns and reference architectures based on successful client engagements.
  • Contribute thought leadership around AI-assisted semiconductor design, advanced-node tape-out readiness, chiplets, and multi-die architectures.

Key Selection Criteria

Required

  • 15+ years of hands-on ASIC and/or SoC design experience, with deep expertise in at least two areas:
  • RTL / microarchitecture
  • Design for Test (DFT)
  • Physical design
  • Functional verification (UVM/SVA)
  • Low-power design (CPF/UPF)
  • Demonstrated experience in a pre-sales, solution architecture, consulting, or client-facing technical leadership role, ideally within an engineering services, semiconductor, or EDA environment.
  • Strong command of major EDA ecosystems, including Synopsys, Cadence, and/or Siemens EDA.
  • Experience with advanced semiconductor process nodes, ideally 7nm and below.
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, VLSI Design, or a related technical discipline.

Preferred

  • Experience with chiplet architectures, UCIe, and/or multi-die integration.
  • Familiarity with AI/ML accelerator architectures, NPUs, and inference-engine design challenges.
  • Experience translating highly complex semiconductor engineering requirements into client-facing solutions, architectures, and delivery models.

Confidentiality

This is a confidential executive search. Additional information regarding the organization, reporting structure, and broader mandate will be shared with qualified candidates during the search process.



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