As a member of our CPU Logic Design Team, you will be responsible for CPU on-chip interconnect ... Work with implementation to achieve your timing, area, performance and power goals. * Assist with ...
As a member of our CPU Logic Design Team, you will be responsible for CPU on-chip interconnect ... Work with implementation to achieve your timing, area, performance and power goals. * Assist with ...
ASIC Design Engineer - New College Grad 2026
Santa Clara, CA · On-site
$125 - $150/hr
As a member of our CPU Logic Design Team, you will be responsible for CPU on-chip interconnect ... Work with implementation to achieve your timing, area, performance and power goals.* Assist with ...
ASIC Design Engineer - New College Grad 2026
Santa Clara, CA · On-site
$125 - $150/hr
As a member of our CPU Logic Design Team, you will be responsible for CPU on-chip interconnect ... Work with implementation to achieve your timing, area, performance and power goals.* Assist with ...
RISCV CPU System RTL Engineer
Santa Clara, CA · On-site
$150 - $200/hr
Job Area Engineering Group > CPU Engineering General Summary We are hiring talented engineers for ... Support functional verification: assist the design verification team in executing verification ...
RISCV CPU System RTL Engineer
Santa Clara, CA · On-site
$150 - $200/hr
Job Area Engineering Group > CPU Engineering General Summary We are hiring talented engineers for ... Support functional verification: assist the design verification team in executing verification ...
GPU Emulation/Verification Engineer
Mountain View, CA · On-site
$160K/yr
General Description Vision: Assist the bring-up of GPU RTL model on an emulation platform. Support ... a GPU and/or multi-processor CPU design. Ability to triage and diagnose test failures to ...
GPU Emulation/Verification Engineer
Mountain View, CA · On-site
$160K/yr
General Description Vision: Assist the bring-up of GPU RTL model on an emulation platform. Support ... a GPU and/or multi-processor CPU design. Ability to triage and diagnose test failures to ...
RISCV CPU System RTL Engineer
Santa Clara, CA · On-site
$117K - $160K/yr
Engineering Group, Engineering Group > CPU Engineering General Summary: We are hiring talented ... Support functional verification: assist the design verification team in executing verification ...
RISCV CPU System RTL Engineer
Santa Clara, CA · On-site
$117K - $160K/yr
Engineering Group, Engineering Group > CPU Engineering General Summary: We are hiring talented ... Support functional verification: assist the design verification team in executing verification ...
Principal Layout Design Engineer
Santa Clara, CA · On-site
$182K - $273K/yr
... CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new ... Support and assist during tapeout phases to ensure successful project completion. * Contribute ...
Principal Layout Design Engineer
Santa Clara, CA · On-site
$182K - $273K/yr
... CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new ... Support and assist during tapeout phases to ensure successful project completion. * Contribute ...
RISCV CPU Systems Architecture/RTL Engineer - Senior Level
Santa Clara, CA · On-site
$117K - $160K/yr
RISCV CPU system features: timer synchronization, interrupt controller, configuration access ... Support functional verification: assist the design verification team in executing verification ...
RISCV CPU Systems Architecture/RTL Engineer - Senior Level
Santa Clara, CA · On-site
$117K - $160K/yr
RISCV CPU system features: timer synchronization, interrupt controller, configuration access ... Support functional verification: assist the design verification team in executing verification ...
Principal Layout Design Engineer
Durham, NC · On-site
$182K - $273K/yr
... CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new ... Support and assist during tapeout phases to ensure successful project completion. * Contribute ...
Principal Layout Design Engineer
Durham, NC · On-site
$182K - $273K/yr
... CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new ... Support and assist during tapeout phases to ensure successful project completion. * Contribute ...
Senior/Staff Design Engineer
$69K - $202K/yr
We are seeking recent-graduates who are eager to become a world-class CPU IP Design Engineer ... and assist in the design verification strategy Assist with the verification of RTL design ...
Senior/Staff Design Engineer
$69K - $202K/yr
We are seeking recent-graduates who are eager to become a world-class CPU IP Design Engineer ... and assist in the design verification strategy Assist with the verification of RTL design ...
Senior/Staff Design Engineer
Austin, TX · On-site
$69K - $202K/yr
We are seeking recent-graduates who are eager to become a world-class CPU IP Design Engineer ... and assist in the design verification strategy Assist with the verification of RTL design ...
Senior/Staff Design Engineer
Austin, TX · On-site
$69K - $202K/yr
We are seeking recent-graduates who are eager to become a world-class CPU IP Design Engineer ... and assist in the design verification strategy Assist with the verification of RTL design ...
Senior/Staff Design Engineer
$69K - $202K/yr
We are seeking recent-graduates who are eager to become a world-class CPU IP Design Engineer ... and assist in the design verification strategy Assist with the verification of RTL design ...
Senior/Staff Design Engineer
$69K - $202K/yr
We are seeking recent-graduates who are eager to become a world-class CPU IP Design Engineer ... and assist in the design verification strategy Assist with the verification of RTL design ...
Senior/Staff Design Engineer
Santa Clara, CA · On-site
$69K - $202K/yr
We are seeking recent-graduates who are eager to become a world-class CPU IP Design Engineer ... and assist in the design verification strategy Assist with the verification of RTL design ...
Senior/Staff Design Engineer
Santa Clara, CA · On-site
$69K - $202K/yr
We are seeking recent-graduates who are eager to become a world-class CPU IP Design Engineer ... and assist in the design verification strategy Assist with the verification of RTL design ...
Virtual Platform Architect
Santa Clara, CA · On-site +1
$147K - $220K/yr
... CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new ... Developing visualization tools to assist in debug and analysis. About you: * 3+ years of proven SoC ...
Virtual Platform Architect
Santa Clara, CA · On-site +1
$147K - $220K/yr
... CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new ... Developing visualization tools to assist in debug and analysis. About you: * 3+ years of proven SoC ...
Virtual Platform Architect
Portland, OR · On-site +1
$147K - $220K/yr
... CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new ... Developing visualization tools to assist in debug and analysis. About you: * 3+ years of proven SoC ...
Virtual Platform Architect
Portland, OR · On-site +1
$147K - $220K/yr
... CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new ... Developing visualization tools to assist in debug and analysis. About you: * 3+ years of proven SoC ...
Staff Engineer AI/ML
Richardson, TX · On-site
$200 - $250/hr
Design of RISC-V Vector CPU core and its custom extensions * Design of AI-enabled Matrix engine to ... Perform Functional verification support and assist in the design verification strategy * Assist ...
Staff Engineer AI/ML
Richardson, TX · On-site
$200 - $250/hr
Design of RISC-V Vector CPU core and its custom extensions * Design of AI-enabled Matrix engine to ... Perform Functional verification support and assist in the design verification strategy * Assist ...
Staff Engineer AI/ML
Santa Clara, CA · On-site
$143K - $275K/yr
We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning ... and assist in the design verification strategy Assist with the verification of RTL design ...
Staff Engineer AI/ML
Santa Clara, CA · On-site
$143K - $275K/yr
We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning ... and assist in the design verification strategy Assist with the verification of RTL design ...
Staff Engineer AI/ML
Richardson, TX · On-site
$143K - $275K/yr
We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning ... and assist in the design verification strategy Assist with the verification of RTL design ...
Staff Engineer AI/ML
Richardson, TX · On-site
$143K - $275K/yr
We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning ... and assist in the design verification strategy Assist with the verification of RTL design ...
Staff Engineer AI/ML
$143K - $275K/yr
We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning ... and assist in the design verification strategy Assist with the verification of RTL design ...
Staff Engineer AI/ML
$143K - $275K/yr
We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning ... and assist in the design verification strategy Assist with the verification of RTL design ...
Staff Engineer AI/ML
Santa Clara, CA · On-site
$143K - $275K/yr
We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning ... and assist in the design verification strategy Assist with the verification of RTL design ...
Staff Engineer AI/ML
Santa Clara, CA · On-site
$143K - $275K/yr
We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning ... and assist in the design verification strategy Assist with the verification of RTL design ...
Sr. Staff ASIC Design Engineer
Sunnyvale, CA · On-site +1
Integrate CPU and other relevant IPs into the CPU sub-system. * Collaborate with the physical ... Perform diagnostic and post-silicon validation tests, as well as assist with software bring-up in ...
Sr. Staff ASIC Design Engineer
Sunnyvale, CA · On-site +1
Integrate CPU and other relevant IPs into the CPU sub-system. * Collaborate with the physical ... Perform diagnostic and post-silicon validation tests, as well as assist with software bring-up in ...
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ASIC Design Engineer - New College Grad 2026
Santa Clara, CA • On-site
Nvidia Corporation •
Computer and Electronic Product Manufacturing • 10K+ employees10,000+ employees
Full-time
Re-posted 6 days ago
Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
6th of 247 rated software companies
Job description
We are now looking for a Logic Design Engineer.
As a member of our CPU Logic Design Team, you will be responsible for CPU on-chip interconnect network, coherency and last-level caches, focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you'll be doing:
What we need to see:
NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and talented people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the fastest and most power efficient chips in their class? If so, come join our CPU design team, we want to hear from you!
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 100,000 USD - 166,750 USD for Level 1, and 116,000 USD - 189,750 USD for Level 2.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until July 21, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
As a member of our CPU Logic Design Team, you will be responsible for CPU on-chip interconnect network, coherency and last-level caches, focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you'll be doing:
- As a member of our core CPU team, you'll own and be responsible for crafting and timely delivery of a specific unit on the chip.
- Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing closure, and design documentation.
- Collaborate with our verification team to verify the correctness of your unit.
- Work with implementation to achieve your timing, area, performance and power goals.
- Assist with timing closure of super units.
What we need to see:
- Recent graduate with a BS or MS Degree in Electrical Engineering, Computer Engineering or Computer Science (or equivalent experience).
- Experience in processor or other related high performance semiconductor designs.
- Verilog expertise required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug
- Effective communication and interpersonal skills are required along with the work in a dynamic, global team. Your successful track record of mentoring junior engineers and interns a huge plus.
- A strong background in computer architecture, cache coherency or high speed interconnects.
NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and talented people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the fastest and most power efficient chips in their class? If so, come join our CPU design team, we want to hear from you!
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 100,000 USD - 166,750 USD for Level 1, and 116,000 USD - 189,750 USD for Level 2.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until July 21, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US