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Volunteer Cpu Design Jobs (NOW HIRING)

Ericsson GmbH

ASIC Design Verification Engineer

Austin, TX · On-site

$90 - $130/hr

  • Medical

  • Dental

  • Life

  • Retirement

  • PTO

CPU pipelines, memory hierarchies, cache coherency protocols. * Early leadership instincts and a ... hours of volunteer time, and 80 hours of sick time annually. Maternity and parental leave are ...

Oracle

GPU/CPU Systems Engineer

Seattle, WA

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Voluntary benefits including auto, homeowner and pet insurance The role will generally accept ... Career Level - IC5 Our Design Engineering organization is looking for a highly driven, capable, and ...

Oracle

GPU/CPU Systems Engineer

Seattle, WA

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Voluntary benefits including auto, homeowner and pet insurance The role will generally accept ... Career Level - IC5 Our Design Engineering organization is looking for a highly driven, capable, and ...

Oracle Corporation

GPU/CPU Systems Engineer

Seattle, WA

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Voluntary benefits including auto, homeowner and pet insurance The role will generally accept ... Career Level - IC5 Our Design Engineering organization is looking for a highly driven, capable, and ...

SK hynix America

Application Test Engineer

San Jose, CA · On-site

  • Medical

  • Retirement

  • PTO

Proven experience with design, simulation, debugging, and performance analysis of CPU-DRAM Memory ... Donation Matching and volunteering opportunities * Corporate discount programs * Free Breakfast ...

Actalent

Senior Electrical Engineer

Waukesha, WI · On-site +1

$75 - $90/hr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Modify and optimize existing CPU-based reference designs for custom embedded applications. * Design ... Life Insurance (Voluntary Life & AD&D for the employee and dependents) * Short and long-term ...

SK hynix America

Application Test Engineer

San Jose, CA · On-site

$90K - $125K/yr

  • Medical

  • Retirement

  • PTO

Proven experience with design, simulation, debugging, and performance analysis of CPU-DRAM Memory ... Donation Matching and volunteering opportunities * Corporate discount programs * Free Breakfast ...

Actalent

Senior Electrical Engineer (100% Remote)

Waukesha, WI · On-site +1

$75 - $90/hr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Modify and optimize existing CPU-based reference designs for custom embedded applications. * Design ... Life Insurance (Voluntary Life & AD&D for the employee and dependents) * Short and long-term ...

Silabs

Associate Staff Verification Engineer - Wireless

Austin, TX

$126K - $234K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

The architecture specification, design, verification, emulation, and implementation of the Wireless ... These SoCs include an embedded CPU system with analog and digital peripherals, advanced security ...

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How much do volunteer cpu design jobs pay per hour?

As of Aug 17, 2026, the average hourly pay for volunteer cpu design in the United States is $19.14, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $20.19 per hour, depending on experience, location, and employer.

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Volunteer Cpu Design jobs near you

Physical Design Engineer at LanceSoft, Inc. San Jose, CA

Downtown Boulder Partnership

San Jose, CA • On-site

$103.32 - $137.76/hr

Other

Medical, Dental, Vision, Life, Retirement

This job post has expired today. Applications are no longer accepted.

Job description

Position Title

Physical Design Engineer job at LanceSoft, Inc., San Jose, CA.

Pay rate range: $75/hr to $100/hr on W2

Job Description

Adding more Info to specs as below-

  • Well-rounded technical leads with extensive experience in large sub-systems and full-chip
  • Min 2–3 full chip execution with End‑to‑End Physical Design activities like FCT (full chip Timing) and FCFP (full chip floor planning)
  • Good communication skills as he will be representing AW in customer discussions at the customer site
  • Should be able to handle complex tech questions coming from the customer
Responsibilities
  • Work closely with logic design team to define physical architecture and drive physical aspects during the design cycle.
  • Collaborate across teams (physical design, logic design, package, DFT and test).
  • Hands‑on synthesis and PnR using industry standard tools for high-speed digital designs in advanced process nodes.
  • Perform all aspects of sign‑off including power, timing, physical verification checks, and design closure.
Experience
  • 5+ years of experience in Physical Design and timing closure.
  • Hands‑on experience in synthesis, PnR and STA using Cadence/Synopsys tools for complex digital designs in 7nm and below.
  • Must have experience of multiple large SoC tapeouts in advanced nodes including hands‑on experience in chip‑level physical design and STA closure.
  • Strong experience in SOC/ASIC/GPU/CPU design flows on taped‑out designs, expertise in timing closure at block/chip levels and ECO flows.
Benefits
  • Four options of medical Insurance
  • Dental and Vision Insurance
  • 401k Contributions
  • Critical Illness Insurance
  • Voluntary Permanent Life Insurance
  • Accident Insurance
  • Other Employee Perks
EEO Statement

LanceSoft is a certified Minority Business Enterprise (MBE) and an equal opportunity employer. We prohibit discrimination and harassment of any kind based on race, color, sex, religion, sexual orientation, national origin, disability, genetic information, pregnancy, or any other protected characteristic as outlined by federal, state, or local laws.

This policy applies to all employment practices within our organization, including hiring, recruiting, promotion, termination, layoff, recall, leave of absence, compensation, benefits, training, and apprenticeship. LanceSoft makes hiring decisions based solely on qualifications, merit, and business needs at the time.

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